[PATCH] D48374: [mips] Sign extend i32 return values on MIPS64

[Stefan Maksimovic via Phabricator via llvm-commits]

smaksimovic planned changes to this revision.
smaksimovic added a comment.

Forgot to mark this explicitly as still being WIP, since we are missing sign extensions at some places.



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Comment at: test/CodeGen/Mips/llvm-ir/or.ll:111
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    sll $2, $1, 0
 ;
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For example here.
What is happening is that the already extended arguments which are operands to the 32 bit OR enable the operation to be transformed to a 64 bit OR through series of combines done at SimplifyBinOpWithSameOpcodeHands in DAGCombiner.cpp.
This in turn renders the sign_extend node introduced as a parent to the 64 bit OR unneeded so it gets removed, which leads to SLL instruction not being generated.

Likewise for the xor.ll test.


https://reviews.llvm.org/D48374