[llvm] r336186 - [AArch64][SVE] Asm: Support for saturing ADD/SUB instructions.

Sander de Smalen via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 3 02:48:22 PDT 2018


Author: s.desmalen
Date: Tue Jul  3 02:48:22 2018
New Revision: 336186

URL: http://llvm.org/viewvc/llvm-project?rev=336186&view=rev
Log:
[AArch64][SVE] Asm: Support for saturing ADD/SUB instructions.

The variants added are:
    signed Saturating ADD/SUB (immediate)  e.g. sqadd z0.h, z0.h, #42
  unsigned Saturating ADD/SUB (immediate)  e.g. uqadd z0.h, z0.h, #42
    signed Saturating ADD/SUB (vectors)    e.g. sqadd z0.h, z0.h, z1.h
  unsigned Saturating ADD/SUB (vectors)    e.g. uqadd z0.h, z0.h, z1.h

Added:
    llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE/sqadd.s
    llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE/sqsub.s
    llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE/uqadd.s
    llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE/uqsub.s
Modified:
    llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td

Modified: llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td?rev=336186&r1=336185&r2=336186&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td Tue Jul  3 02:48:22 2018
@@ -14,6 +14,10 @@
 let Predicates = [HasSVE] in {
   defm ADD_ZZZ   : sve_int_bin_cons_arit_0<0b000, "add">;
   defm SUB_ZZZ   : sve_int_bin_cons_arit_0<0b001, "sub">;
+  defm SQADD_ZZZ : sve_int_bin_cons_arit_0<0b100, "sqadd">;
+  defm UQADD_ZZZ : sve_int_bin_cons_arit_0<0b101, "uqadd">;
+  defm SQSUB_ZZZ : sve_int_bin_cons_arit_0<0b110, "sqsub">;
+  defm UQSUB_ZZZ : sve_int_bin_cons_arit_0<0b111, "uqsub">;
 
   def AND_ZZZ : sve_int_bin_cons_log<0b00, "and">;
   def ORR_ZZZ : sve_int_bin_cons_log<0b01, "orr">;
@@ -30,6 +34,10 @@ let Predicates = [HasSVE] in {
 
   defm ADD_ZI   : sve_int_arith_imm0<0b000, "add">;
   defm SUB_ZI   : sve_int_arith_imm0<0b001, "sub">;
+  defm SQADD_ZI : sve_int_arith_imm0<0b100, "sqadd">;
+  defm UQADD_ZI : sve_int_arith_imm0<0b101, "uqadd">;
+  defm SQSUB_ZI : sve_int_arith_imm0<0b110, "sqsub">;
+  defm UQSUB_ZI : sve_int_arith_imm0<0b111, "uqsub">;
 
   defm ORR_ZI : sve_int_log_imm<0b00, "orr", "orn">;
   defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon">;

Added: llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,88 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// Register z32 does not exist.
+sqadd z22.h, z10.h, z32.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: sqadd z22.h, z10.h, z32.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Invalid element kind.
+sqadd z20.h, z2.h, z31.x
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid vector kind qualifier
+// CHECK-NEXT: sqadd z20.h, z2.h, z31.x
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Element size specifiers should match.
+sqadd z27.h, z11.h, z27.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: sqadd z27.h, z11.h, z27.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid immediates
+
+sqadd     z0.b, z0.b, #0, lsl #8      // #0, lsl #8 is not valid for .b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqadd     z0.b, z0.b, #0, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.b, z0.b, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqadd     z0.b, z0.b, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.b, z0.b, #1, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqadd     z0.b, z0.b, #1, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.b, z0.b, #256
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqadd     z0.b, z0.b, #256
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.h, z0.h, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.h, z0.h, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.h, z0.h, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.h, z0.h, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.h, z0.h, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.h, z0.h, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.s, z0.s, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.s, z0.s, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.s, z0.s, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.s, z0.s, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.s, z0.s, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.s, z0.s, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.d, z0.d, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.d, z0.d, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.d, z0.d, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.d, z0.d, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqadd     z0.d, z0.d, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqadd     z0.d, z0.d, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE/sqadd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqadd.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqadd.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/sqadd.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,117 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+sqadd     z0.b, z0.b, z0.b
+// CHECK-INST: sqadd z0.b, z0.b, z0.b
+// CHECK-ENCODING: [0x00,0x10,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 10 20 04 <unknown>
+
+sqadd     z0.h, z0.h, z0.h
+// CHECK-INST: sqadd z0.h, z0.h, z0.h
+// CHECK-ENCODING: [0x00,0x10,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 10 60 04 <unknown>
+
+sqadd     z0.s, z0.s, z0.s
+// CHECK-INST: sqadd z0.s, z0.s, z0.s
+// CHECK-ENCODING: [0x00,0x10,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 10 a0 04 <unknown>
+
+sqadd     z0.d, z0.d, z0.d
+// CHECK-INST: sqadd z0.d, z0.d, z0.d
+// CHECK-ENCODING: [0x00,0x10,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 10 e0 04 <unknown>
+
+sqadd     z0.b, z0.b, #0
+// CHECK-INST: sqadd z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x24,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 24 25 <unknown>
+
+sqadd     z31.b, z31.b, #255
+// CHECK-INST: sqadd z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x24,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 24 25 <unknown>
+
+sqadd     z0.h, z0.h, #0
+// CHECK-INST: sqadd z0.h, z0.h, #0
+// CHECK-ENCODING: [0x00,0xc0,0x64,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 64 25 <unknown>
+
+sqadd     z0.h, z0.h, #0, lsl #8
+// CHECK-INST: sqadd z0.h, z0.h, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0x64,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 64 25 <unknown>
+
+sqadd     z31.h, z31.h, #255, lsl #8
+// CHECK-INST: sqadd z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x64,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 64 25 <unknown>
+
+sqadd     z31.h, z31.h, #65280
+// CHECK-INST: sqadd z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x64,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 64 25 <unknown>
+
+sqadd     z0.s, z0.s, #0
+// CHECK-INST: sqadd z0.s, z0.s, #0
+// CHECK-ENCODING: [0x00,0xc0,0xa4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 a4 25 <unknown>
+
+sqadd     z0.s, z0.s, #0, lsl #8
+// CHECK-INST: sqadd z0.s, z0.s, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xa4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 a4 25 <unknown>
+
+sqadd     z31.s, z31.s, #255, lsl #8
+// CHECK-INST: sqadd z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a4 25 <unknown>
+
+sqadd     z31.s, z31.s, #65280
+// CHECK-INST: sqadd z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a4 25 <unknown>
+
+sqadd     z0.d, z0.d, #0
+// CHECK-INST: sqadd z0.d, z0.d, #0
+// CHECK-ENCODING: [0x00,0xc0,0xe4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 e4 25 <unknown>
+
+sqadd     z0.d, z0.d, #0, lsl #8
+// CHECK-INST: sqadd z0.d, z0.d, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xe4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 e4 25 <unknown>
+
+sqadd     z31.d, z31.d, #255, lsl #8
+// CHECK-INST: sqadd z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e4 25 <unknown>
+
+sqadd     z31.d, z31.d, #65280
+// CHECK-INST: sqadd z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e4 25 <unknown>

Added: llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,88 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// Register z32 does not exist.
+sqsub z22.h, z10.h, z32.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: sqsub z22.h, z10.h, z32.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Invalid element kind.
+sqsub z20.h, z2.h, z31.x
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid vector kind qualifier
+// CHECK-NEXT: sqsub z20.h, z2.h, z31.x
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Element size specifiers should match.
+sqsub z27.h, z11.h, z27.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: sqsub z27.h, z11.h, z27.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid immediates
+
+sqsub     z0.b, z0.b, #0, lsl #8      // #0, lsl #8 is not valid for .b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqsub     z0.b, z0.b, #0, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.b, z0.b, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqsub     z0.b, z0.b, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.b, z0.b, #1, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqsub     z0.b, z0.b, #1, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.b, z0.b, #256
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: sqsub     z0.b, z0.b, #256
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.h, z0.h, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.h, z0.h, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.h, z0.h, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.h, z0.h, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.h, z0.h, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.h, z0.h, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.s, z0.s, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.s, z0.s, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.s, z0.s, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.s, z0.s, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.s, z0.s, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.s, z0.s, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.d, z0.d, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.d, z0.d, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.d, z0.d, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.d, z0.d, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqsub     z0.d, z0.d, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: sqsub     z0.d, z0.d, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE/sqsub.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqsub.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqsub.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/sqsub.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,117 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+sqsub     z0.b, z0.b, z0.b
+// CHECK-INST: sqsub z0.b, z0.b, z0.b
+// CHECK-ENCODING: [0x00,0x18,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 18 20 04 <unknown>
+
+sqsub     z0.h, z0.h, z0.h
+// CHECK-INST: sqsub z0.h, z0.h, z0.h
+// CHECK-ENCODING: [0x00,0x18,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 18 60 04 <unknown>
+
+sqsub     z0.s, z0.s, z0.s
+// CHECK-INST: sqsub z0.s, z0.s, z0.s
+// CHECK-ENCODING: [0x00,0x18,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 18 a0 04 <unknown>
+
+sqsub     z0.d, z0.d, z0.d
+// CHECK-INST: sqsub z0.d, z0.d, z0.d
+// CHECK-ENCODING: [0x00,0x18,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 18 e0 04 <unknown>
+
+sqsub     z0.b, z0.b, #0
+// CHECK-INST: sqsub z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x26,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 26 25 <unknown>
+
+sqsub     z31.b, z31.b, #255
+// CHECK-INST: sqsub z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x26,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 26 25 <unknown>
+
+sqsub     z0.h, z0.h, #0
+// CHECK-INST: sqsub z0.h, z0.h, #0
+// CHECK-ENCODING: [0x00,0xc0,0x66,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 66 25 <unknown>
+
+sqsub     z0.h, z0.h, #0, lsl #8
+// CHECK-INST: sqsub z0.h, z0.h, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0x66,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 66 25 <unknown>
+
+sqsub     z31.h, z31.h, #255, lsl #8
+// CHECK-INST: sqsub z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x66,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 66 25 <unknown>
+
+sqsub     z31.h, z31.h, #65280
+// CHECK-INST: sqsub z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x66,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 66 25 <unknown>
+
+sqsub     z0.s, z0.s, #0
+// CHECK-INST: sqsub z0.s, z0.s, #0
+// CHECK-ENCODING: [0x00,0xc0,0xa6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 a6 25 <unknown>
+
+sqsub     z0.s, z0.s, #0, lsl #8
+// CHECK-INST: sqsub z0.s, z0.s, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xa6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 a6 25 <unknown>
+
+sqsub     z31.s, z31.s, #255, lsl #8
+// CHECK-INST: sqsub z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a6 25 <unknown>
+
+sqsub     z31.s, z31.s, #65280
+// CHECK-INST: sqsub z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a6 25 <unknown>
+
+sqsub     z0.d, z0.d, #0
+// CHECK-INST: sqsub z0.d, z0.d, #0
+// CHECK-ENCODING: [0x00,0xc0,0xe6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 e6 25 <unknown>
+
+sqsub     z0.d, z0.d, #0, lsl #8
+// CHECK-INST: sqsub z0.d, z0.d, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xe6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 e6 25 <unknown>
+
+sqsub     z31.d, z31.d, #255, lsl #8
+// CHECK-INST: sqsub z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e6 25 <unknown>
+
+sqsub     z31.d, z31.d, #65280
+// CHECK-INST: sqsub z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e6 25 <unknown>

Added: llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,88 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// Register z32 does not exist.
+uqadd z22.h, z10.h, z32.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: uqadd z22.h, z10.h, z32.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Invalid element kind.
+uqadd z20.h, z2.h, z31.x
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid vector kind qualifier
+// CHECK-NEXT: uqadd z20.h, z2.h, z31.x
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Element size specifiers should match.
+uqadd z27.h, z11.h, z27.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: uqadd z27.h, z11.h, z27.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid immediates
+
+uqadd     z0.b, z0.b, #0, lsl #8      // #0, lsl #8 is not valid for .b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqadd     z0.b, z0.b, #0, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.b, z0.b, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqadd     z0.b, z0.b, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.b, z0.b, #1, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqadd     z0.b, z0.b, #1, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.b, z0.b, #256
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqadd     z0.b, z0.b, #256
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.h, z0.h, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.h, z0.h, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.h, z0.h, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.h, z0.h, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.h, z0.h, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.h, z0.h, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.s, z0.s, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.s, z0.s, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.s, z0.s, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.s, z0.s, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.s, z0.s, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.s, z0.s, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.d, z0.d, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.d, z0.d, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.d, z0.d, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.d, z0.d, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqadd     z0.d, z0.d, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqadd     z0.d, z0.d, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE/uqadd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqadd.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqadd.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/uqadd.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,117 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+uqadd     z0.b, z0.b, z0.b
+// CHECK-INST: uqadd z0.b, z0.b, z0.b
+// CHECK-ENCODING: [0x00,0x14,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 14 20 04 <unknown>
+
+uqadd     z0.h, z0.h, z0.h
+// CHECK-INST: uqadd z0.h, z0.h, z0.h
+// CHECK-ENCODING: [0x00,0x14,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 14 60 04 <unknown>
+
+uqadd     z0.s, z0.s, z0.s
+// CHECK-INST: uqadd z0.s, z0.s, z0.s
+// CHECK-ENCODING: [0x00,0x14,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 14 a0 04 <unknown>
+
+uqadd     z0.d, z0.d, z0.d
+// CHECK-INST: uqadd z0.d, z0.d, z0.d
+// CHECK-ENCODING: [0x00,0x14,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 14 e0 04 <unknown>
+
+uqadd     z0.b, z0.b, #0
+// CHECK-INST: uqadd z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x25,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 25 25 <unknown>
+
+uqadd     z31.b, z31.b, #255
+// CHECK-INST: uqadd z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x25,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 25 25 <unknown>
+
+uqadd     z0.h, z0.h, #0
+// CHECK-INST: uqadd z0.h, z0.h, #0
+// CHECK-ENCODING: [0x00,0xc0,0x65,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 65 25 <unknown>
+
+uqadd     z0.h, z0.h, #0, lsl #8
+// CHECK-INST: uqadd z0.h, z0.h, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0x65,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 65 25 <unknown>
+
+uqadd     z31.h, z31.h, #255, lsl #8
+// CHECK-INST: uqadd z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x65,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 65 25 <unknown>
+
+uqadd     z31.h, z31.h, #65280
+// CHECK-INST: uqadd z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x65,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 65 25 <unknown>
+
+uqadd     z0.s, z0.s, #0
+// CHECK-INST: uqadd z0.s, z0.s, #0
+// CHECK-ENCODING: [0x00,0xc0,0xa5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 a5 25 <unknown>
+
+uqadd     z0.s, z0.s, #0, lsl #8
+// CHECK-INST: uqadd z0.s, z0.s, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xa5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 a5 25 <unknown>
+
+uqadd     z31.s, z31.s, #255, lsl #8
+// CHECK-INST: uqadd z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a5 25 <unknown>
+
+uqadd     z31.s, z31.s, #65280
+// CHECK-INST: uqadd z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a5 25 <unknown>
+
+uqadd     z0.d, z0.d, #0
+// CHECK-INST: uqadd z0.d, z0.d, #0
+// CHECK-ENCODING: [0x00,0xc0,0xe5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 e5 25 <unknown>
+
+uqadd     z0.d, z0.d, #0, lsl #8
+// CHECK-INST: uqadd z0.d, z0.d, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xe5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 e5 25 <unknown>
+
+uqadd     z31.d, z31.d, #255, lsl #8
+// CHECK-INST: uqadd z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e5 25 <unknown>
+
+uqadd     z31.d, z31.d, #65280
+// CHECK-INST: uqadd z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e5 25 <unknown>

Added: llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,88 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// Register z32 does not exist.
+uqsub z22.h, z10.h, z32.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: uqsub z22.h, z10.h, z32.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Invalid element kind.
+uqsub z20.h, z2.h, z31.x
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid vector kind qualifier
+// CHECK-NEXT: uqsub z20.h, z2.h, z31.x
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Element size specifiers should match.
+uqsub z27.h, z11.h, z27.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: uqsub z27.h, z11.h, z27.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid immediates
+
+uqsub     z0.b, z0.b, #0, lsl #8      // #0, lsl #8 is not valid for .b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqsub     z0.b, z0.b, #0, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.b, z0.b, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqsub     z0.b, z0.b, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.b, z0.b, #1, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqsub     z0.b, z0.b, #1, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.b, z0.b, #256
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] with a shift amount of 0
+// CHECK-NEXT: uqsub     z0.b, z0.b, #256
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.h, z0.h, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.h, z0.h, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.h, z0.h, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.h, z0.h, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.h, z0.h, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.h, z0.h, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.s, z0.s, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.s, z0.s, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.s, z0.s, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.s, z0.s, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.s, z0.s, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.s, z0.s, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.d, z0.d, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.d, z0.d, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.d, z0.d, #256, lsl #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.d, z0.d, #256, lsl #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uqsub     z0.d, z0.d, #65536
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
+// CHECK-NEXT: uqsub     z0.d, z0.d, #65536
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE/uqsub.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqsub.s?rev=336186&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqsub.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/uqsub.s Tue Jul  3 02:48:22 2018
@@ -0,0 +1,117 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+uqsub     z0.b, z0.b, z0.b
+// CHECK-INST: uqsub z0.b, z0.b, z0.b
+// CHECK-ENCODING: [0x00,0x1c,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 1c 20 04 <unknown>
+
+uqsub     z0.h, z0.h, z0.h
+// CHECK-INST: uqsub z0.h, z0.h, z0.h
+// CHECK-ENCODING: [0x00,0x1c,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 1c 60 04 <unknown>
+
+uqsub     z0.s, z0.s, z0.s
+// CHECK-INST: uqsub z0.s, z0.s, z0.s
+// CHECK-ENCODING: [0x00,0x1c,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 1c a0 04 <unknown>
+
+uqsub     z0.d, z0.d, z0.d
+// CHECK-INST: uqsub z0.d, z0.d, z0.d
+// CHECK-ENCODING: [0x00,0x1c,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 1c e0 04 <unknown>
+
+uqsub     z0.b, z0.b, #0
+// CHECK-INST: uqsub z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x27,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 27 25 <unknown>
+
+uqsub     z31.b, z31.b, #255
+// CHECK-INST: uqsub z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x27,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 27 25 <unknown>
+
+uqsub     z0.h, z0.h, #0
+// CHECK-INST: uqsub z0.h, z0.h, #0
+// CHECK-ENCODING: [0x00,0xc0,0x67,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 67 25 <unknown>
+
+uqsub     z0.h, z0.h, #0, lsl #8
+// CHECK-INST: uqsub z0.h, z0.h, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0x67,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 67 25 <unknown>
+
+uqsub     z31.h, z31.h, #255, lsl #8
+// CHECK-INST: uqsub z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x67,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 67 25 <unknown>
+
+uqsub     z31.h, z31.h, #65280
+// CHECK-INST: uqsub z31.h, z31.h, #65280
+// CHECK-ENCODING: [0xff,0xff,0x67,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff 67 25 <unknown>
+
+uqsub     z0.s, z0.s, #0
+// CHECK-INST: uqsub z0.s, z0.s, #0
+// CHECK-ENCODING: [0x00,0xc0,0xa7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 a7 25 <unknown>
+
+uqsub     z0.s, z0.s, #0, lsl #8
+// CHECK-INST: uqsub z0.s, z0.s, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xa7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 a7 25 <unknown>
+
+uqsub     z31.s, z31.s, #255, lsl #8
+// CHECK-INST: uqsub z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a7 25 <unknown>
+
+uqsub     z31.s, z31.s, #65280
+// CHECK-INST: uqsub z31.s, z31.s, #65280
+// CHECK-ENCODING: [0xff,0xff,0xa7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff a7 25 <unknown>
+
+uqsub     z0.d, z0.d, #0
+// CHECK-INST: uqsub z0.d, z0.d, #0
+// CHECK-ENCODING: [0x00,0xc0,0xe7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 e7 25 <unknown>
+
+uqsub     z0.d, z0.d, #0, lsl #8
+// CHECK-INST: uqsub z0.d, z0.d, #0, lsl #8
+// CHECK-ENCODING: [0x00,0xe0,0xe7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 e7 25 <unknown>
+
+uqsub     z31.d, z31.d, #255, lsl #8
+// CHECK-INST: uqsub z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e7 25 <unknown>
+
+uqsub     z31.d, z31.d, #65280
+// CHECK-INST: uqsub z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e7 25 <unknown>




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