[PATCH] D48870: [AArch64][SVE] Asm: Support for ADR instruction.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen created this revision.
sdesmalen added reviewers: rengolin, fhahn, SjoerdMeijer, samparker.
Herald added a reviewer: javed.absar.
Herald added subscribers: rkruppe, kristof.beyls, tschuett.

Supporting various addressing modes:

- adr z0.s, [z0.s, z0.s]
- adr z0.s, [z0.s, z0.s, lsl #<shift>]
- adr z0.d, [z0.d, z0.d]
- adr z0.d, [z0.d, z0.d, lsl #<shift>]
- adr z0.d, [z0.d, z0.d, uxtw #<shift>]
- adr z0.d, [z0.d, z0.d, sxtw #<shift>]


https://reviews.llvm.org/D48870

Files:
  lib/Target/AArch64/AArch64RegisterInfo.td
  lib/Target/AArch64/AArch64SVEInstrInfo.td
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  lib/Target/AArch64/SVEInstrFormats.td
  test/MC/AArch64/SVE/adr-diagnostics.s
  test/MC/AArch64/SVE/adr.s

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