[PATCH] D48820: [llvm-exegesis] ExegisX86Target::setRegToConstant() should depend on the subtarget features.

[Clement Courbet via Phabricator via llvm-commits]

courbet added inline comments.


================
Comment at: tools/llvm-exegesis/lib/X86/Target.cpp:151
+      if (STI.getFeatureBits()[llvm::X86::FeatureAVX512])
+        return setVectorRegToConstant(Reg, 16, llvm::X86::VMOVDQU16Zrm);
+      if (STI.getFeatureBits()[llvm::X86::FeatureAVX])
----------------
RKSimon wrote:
> Isn't VMOVDQU16Zrm BWI only?
Thanks for the catch: I mixed up the size of the scalars and the size of the vector register :( I meant VMOVDQU32Z128rm: move 32-*bit* scalars into a 16-*byte* vector register :(


Repository:
  rL LLVM

https://reviews.llvm.org/D48820