[PATCH] D48725: [SLP] Vectorize bit-parallel operations with SWAR.

[Clement Courbet via Phabricator via llvm-commits]

courbet planned changes to this revision.
courbet added a comment.

Thank you all for your comments.

So let me sum up the options from the various comments here:
A - Keep this change in the SLP vectorizer. This requires emitting GPR operations instead of vector operations, and updating the cost model.
B - Do this in DAG, inside or near to LoadCombine.

I'll explore both solutions and create a patch with (B) so that we can compare.


Repository:
  rL LLVM

https://reviews.llvm.org/D48725