[PATCH] D48777: AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.

[Tom Stellard via Phabricator via llvm-commits]

tstellar created this revision.
tstellar added a reviewer: arsenm.
Herald added subscribers: t-tye, tpr, dstuttard, kristof.beyls, rovka, yaxunl, nhaehnle, wdng, kzhuravl.

We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector.  Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.


Repository:
  rL LLVM

https://reviews.llvm.org/D48777

Files:
  lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir


Index: test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
@@ -0,0 +1,20 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -run-pass=legalizer %s -o - | FileCheck %s
+
+# FIXME: Need to add test for IMPLICIT_DEF > 512 once all the operations used
+# to legalize IMPLICIT_DEF are leagl.
+
+---
+name:            test_implicit_def
+body: |
+  bb.0:
+    liveins: $vgpr0, $vgpr1
+
+    ; CHECK-LABEL: name: test_implicit_def
+    ; CHECK: [[DEF:%[0-9]+]]:_(s448) = G_IMPLICIT_DEF
+    ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[DEF]](s448), 0
+    ; CHECK: $vgpr0 = COPY [[EXTRACT]](s32)
+    %0:_(s448) = G_IMPLICIT_DEF
+    %1:_(s32) = G_EXTRACT %0, 0
+    $vgpr0 = COPY %1
+...
Index: lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -39,6 +39,7 @@
 
   const LLT S32 = LLT::scalar(32);
   const LLT S64 = LLT::scalar(64);
+  const LLT S512 = LLT::scalar(512);
 
   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
@@ -70,9 +71,16 @@
 
   getActionDefinitionsBuilder(G_FCONSTANT)
     .legalFor({S32, S64});
+
+  // G_IMPLICIT_DEF is a no-op so we can make it legal for any value type that
+  // can fit in a register.
+  // FIXME: We need to legalize several more operations before we can add
+  // a test case for size > 512.
   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
-    .legalFor({S1, S32, S64,
-               GlobalPtr, ConstantPtr, LocalPtr, FlatPtr, PrivatePtr});
+    .legalIf([=](const LegalityQuery &Query) {
+        return Query.Types[0].getSizeInBits() <= 512;
+    })
+    .clampScalar(0, S1, S512);
 
   getActionDefinitionsBuilder(G_CONSTANT)
     .legalFor({S1, S32, S64});


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