[llvm] r335953 - [ARM][AArch64] Armv8.4-A Enablement
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 29 10:28:03 PDT 2018
Hey Sjoerd,
On Fri, Jun 29, 2018 at 1:43 AM, Sjoerd Meijer via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: sjoerdmeijer
> Date: Fri Jun 29 01:43:19 2018
> New Revision: 335953
>
> URL: http://llvm.org/viewvc/llvm-project?rev=335953&view=rev
> Log:
> [ARM][AArch64] Armv8.4-A Enablement
>
> Initial patch adding assembly support for Armv8.4-A.
>
> Besides adding v8.4 as a supported architecture to the usual places, this also
> adds target features for the different crypto algorithms. Armv8.4-A introduced
> new crypto algorithms, made them optional, and allows different combinations:
>
> - none of the v8.4 crypto functions are supported, which is independent of the
> implementation of the Armv8.0 SHA1 and SHA2 instructions.
> - the v8.4 SHA512 and SHA3 support is implemented, in this case the Armv8.0
> SHA1 and SHA2 instructions must also be implemented.
> - the v8.4 SM3 and SM4 support is implemented, which is independent of the
> implementation of the Armv8.0 SHA1 and SHA2 instructions.
> - all of the v8.4 crypto functions are supported, in this case the Armv8.0 SHA1
> and SHA2 instructions must also be implemented.
>
> The v8.4 crypto instructions are added to AArch64 only, and not AArch32,
> and are made optional extensions to Armv8.2-A.
>
> The user-facing Clang options will map on these new target features, their
> naming will be compatible with GCC and added in follow-up patches.
>
> The Armv8.4-A instruction sets can be downloaded here:
> https://developer.arm.com/products/architecture/a-profile/exploration-tools
>
> Differential Revision: https://reviews.llvm.org/D48625
>
> Modified:
> llvm/trunk/include/llvm/ADT/Triple.h
> llvm/trunk/include/llvm/Support/AArch64TargetParser.def
> llvm/trunk/include/llvm/Support/ARMTargetParser.def
> llvm/trunk/include/llvm/Support/TargetParser.h
> llvm/trunk/lib/Support/TargetParser.cpp
> llvm/trunk/lib/Support/Triple.cpp
> llvm/trunk/lib/Target/AArch64/AArch64.td
> llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
> llvm/trunk/lib/Target/ARM/ARM.td
> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> llvm/trunk/lib/Target/ARM/ARMSubtarget.h
> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
>
> Modified: llvm/trunk/include/llvm/ADT/Triple.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/ADT/Triple.h (original)
> +++ llvm/trunk/include/llvm/ADT/Triple.h Fri Jun 29 01:43:19 2018
> @@ -101,6 +101,7 @@ public:
> enum SubArchType {
> NoSubArch,
>
> + ARMSubArch_v8_4a,
> ARMSubArch_v8_3a,
> ARMSubArch_v8_2a,
> ARMSubArch_v8_1a,
>
> Modified: llvm/trunk/include/llvm/Support/AArch64TargetParser.def
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/AArch64TargetParser.def?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/AArch64TargetParser.def (original)
> +++ llvm/trunk/include/llvm/Support/AArch64TargetParser.def Fri Jun 29 01:43:19 2018
> @@ -35,6 +35,11 @@ AARCH64_ARCH("armv8.3-a", ARMV8_3A, "8.3
> (AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
> AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
> AArch64::AEK_RDM | AArch64::AEK_RCPC))
> +AARCH64_ARCH("armv8.4-a", ARMV8_4A, "8.4-A", "v8.4a",
> + ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
> + (AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
> + AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
> + AArch64::AEK_RDM | AArch64::AEK_RCPC))
Should dotprod be implied here?
-Ahmed
> #undef AARCH64_ARCH
>
> #ifndef AARCH64_ARCH_EXT_NAME
> @@ -47,6 +52,10 @@ AARCH64_ARCH_EXT_NAME("crc", AArch6
> AARCH64_ARCH_EXT_NAME("lse", AArch64::AEK_LSE, "+lse", "-lse")
> AARCH64_ARCH_EXT_NAME("rdm", AArch64::AEK_RDM, "+rdm", "-rdm")
> AARCH64_ARCH_EXT_NAME("crypto", AArch64::AEK_CRYPTO, "+crypto","-crypto")
> +AARCH64_ARCH_EXT_NAME("sm4", AArch64::AEK_SM4, "+sm4", "-sm4")
> +AARCH64_ARCH_EXT_NAME("sha3", AArch64::AEK_SHA3, "+sha3", "-sha3")
> +AARCH64_ARCH_EXT_NAME("sha2", AArch64::AEK_SHA2, "+sha2", "-sha2")
> +AARCH64_ARCH_EXT_NAME("aes", AArch64::AEK_AES, "+aes", "-aes")
> AARCH64_ARCH_EXT_NAME("dotprod", AArch64::AEK_DOTPROD, "+dotprod","-dotprod")
> AARCH64_ARCH_EXT_NAME("fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8")
> AARCH64_ARCH_EXT_NAME("simd", AArch64::AEK_SIMD, "+neon", "-neon")
>
> Modified: llvm/trunk/include/llvm/Support/ARMTargetParser.def
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ARMTargetParser.def?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/ARMTargetParser.def (original)
> +++ llvm/trunk/include/llvm/Support/ARMTargetParser.def Fri Jun 29 01:43:19 2018
> @@ -101,6 +101,10 @@ ARM_ARCH("armv8.3-a", ARMV8_3A, "8.3-A",
> ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
> (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
> ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS))
> +ARM_ARCH("armv8.4-a", ARMV8_4A, "8.4-A", "v8.4a",
> + ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
> + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
> + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS))
> ARM_ARCH("armv8-r", ARMV8R, "8-R", "v8r", ARMBuildAttrs::CPUArch::v8_R,
> FK_NEON_FP_ARMV8,
> (ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
> @@ -130,6 +134,8 @@ ARM_ARCH_EXT_NAME("invalid", ARM::AEK_I
> ARM_ARCH_EXT_NAME("none", ARM::AEK_NONE, nullptr, nullptr)
> ARM_ARCH_EXT_NAME("crc", ARM::AEK_CRC, "+crc", "-crc")
> ARM_ARCH_EXT_NAME("crypto", ARM::AEK_CRYPTO, "+crypto","-crypto")
> +ARM_ARCH_EXT_NAME("sha2", ARM::AEK_SHA2, "+sha2", "-sha2")
> +ARM_ARCH_EXT_NAME("aes", ARM::AEK_AES, "+aes", "-aes")
> ARM_ARCH_EXT_NAME("dotprod", ARM::AEK_DOTPROD, "+dotprod","-dotprod")
> ARM_ARCH_EXT_NAME("dsp", ARM::AEK_DSP, "+dsp", "-dsp")
> ARM_ARCH_EXT_NAME("fp", ARM::AEK_FP, nullptr, nullptr)
>
> Modified: llvm/trunk/include/llvm/Support/TargetParser.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetParser.h?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/TargetParser.h (original)
> +++ llvm/trunk/include/llvm/Support/TargetParser.h Fri Jun 29 01:43:19 2018
> @@ -86,6 +86,8 @@ enum ArchExtKind : unsigned {
> AEK_RAS = 1 << 12,
> AEK_SVE = 1 << 13,
> AEK_DOTPROD = 1 << 14,
> + AEK_SHA2 = 1 << 15,
> + AEK_AES = 1 << 16,
> // Unsupported extensions.
> AEK_OS = 0x8000000,
> AEK_IWMMXT = 0x10000000,
> @@ -171,7 +173,11 @@ enum ArchExtKind : unsigned {
> AEK_SVE = 1 << 9,
> AEK_DOTPROD = 1 << 10,
> AEK_RCPC = 1 << 11,
> - AEK_RDM = 1 << 12
> + AEK_RDM = 1 << 12,
> + AEK_SM4 = 1 << 13,
> + AEK_SHA3 = 1 << 14,
> + AEK_SHA2 = 1 << 15,
> + AEK_AES = 1 << 16,
> };
>
> StringRef getCanonicalArchName(StringRef Arch);
>
> Modified: llvm/trunk/lib/Support/TargetParser.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/TargetParser.cpp?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Support/TargetParser.cpp (original)
> +++ llvm/trunk/lib/Support/TargetParser.cpp Fri Jun 29 01:43:19 2018
> @@ -480,6 +480,8 @@ bool llvm::AArch64::getArchFeatures(AArc
> Features.push_back("+v8.2a");
> if (AK == AArch64::ArchKind::ARMV8_3A)
> Features.push_back("+v8.3a");
> + if (AK == AArch64::ArchKind::ARMV8_4A)
> + Features.push_back("+v8.4a");
>
> return AK != AArch64::ArchKind::INVALID;
> }
> @@ -585,6 +587,7 @@ static StringRef getArchSynonym(StringRe
> .Case("v8.1a", "v8.1-a")
> .Case("v8.2a", "v8.2-a")
> .Case("v8.3a", "v8.3-a")
> + .Case("v8.4a", "v8.4-a")
> .Case("v8r", "v8-r")
> .Case("v8m.base", "v8-m.base")
> .Case("v8m.main", "v8-m.main")
> @@ -752,6 +755,7 @@ ARM::ProfileKind ARM::parseArchProfile(S
> case ARM::ArchKind::ARMV8_1A:
> case ARM::ArchKind::ARMV8_2A:
> case ARM::ArchKind::ARMV8_3A:
> + case ARM::ArchKind::ARMV8_4A:
> return ARM::ProfileKind::A;
> case ARM::ArchKind::ARMV2:
> case ARM::ArchKind::ARMV2A:
> @@ -814,6 +818,7 @@ unsigned llvm::ARM::parseArchVersion(Str
> case ARM::ArchKind::ARMV8_1A:
> case ARM::ArchKind::ARMV8_2A:
> case ARM::ArchKind::ARMV8_3A:
> + case ARM::ArchKind::ARMV8_4A:
> case ARM::ArchKind::ARMV8R:
> case ARM::ArchKind::ARMV8MBaseline:
> case ARM::ArchKind::ARMV8MMainline:
>
> Modified: llvm/trunk/lib/Support/Triple.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Support/Triple.cpp (original)
> +++ llvm/trunk/lib/Support/Triple.cpp Fri Jun 29 01:43:19 2018
> @@ -590,6 +590,8 @@ static Triple::SubArchType parseSubArch(
> return Triple::ARMSubArch_v8_2a;
> case ARM::ArchKind::ARMV8_3A:
> return Triple::ARMSubArch_v8_3a;
> + case ARM::ArchKind::ARMV8_4A:
> + return Triple::ARMSubArch_v8_4a;
> case ARM::ArchKind::ARMV8R:
> return Triple::ARMSubArch_v8r;
> case ARM::ArchKind::ARMV8MBaseline:
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64.td Fri Jun 29 01:43:19 2018
> @@ -26,8 +26,32 @@ def FeatureFPARMv8 : SubtargetFeature<"f
> def FeatureNEON : SubtargetFeature<"neon", "HasNEON", "true",
> "Enable Advanced SIMD instructions", [FeatureFPARMv8]>;
>
> +def FeatureSM4 : SubtargetFeature<
> + "sm4", "HasSM4", "true",
> + "Enable SM3 and SM4 support", [FeatureNEON]>;
> +
> +def FeatureSHA2 : SubtargetFeature<
> + "sha2", "HasSHA2", "true",
> + "Enable SHA1 and SHA256 support", [FeatureNEON]>;
> +
> +def FeatureSHA3 : SubtargetFeature<
> + "sha3", "HasSHA3", "true",
> + "Enable SHA512 and SHA3 support", [FeatureNEON, FeatureSHA2]>;
> +
> +def FeatureAES : SubtargetFeature<
> + "aes", "HasAES", "true",
> + "Enable AES support", [FeatureNEON]>;
> +
> +// Crypto has been split up and any combination is now valid (see the
> +// crypto defintions above). Also, crypto is now context sensitive:
> +// it has a different meaning for e.g. Armv8.4 than it has for Armv8.2.
> +// Therefore, we rely on Clang, the user interacing tool, to pass on the
> +// appropriate crypto options. But here in the backend, crypto has very little
> +// meaning anymore. We kept the Crypto defintion here for backward
> +// compatibility, and now imply features SHA2 and AES, which was the
> +// "traditional" meaning of Crypto.
> def FeatureCrypto : SubtargetFeature<"crypto", "HasCrypto", "true",
> - "Enable cryptographic instructions", [FeatureNEON]>;
> + "Enable cryptographic instructions", [FeatureNEON, FeatureSHA2, FeatureAES]>;
>
> def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true",
> "Enable ARMv8 CRC-32 checksum instructions">;
> @@ -185,6 +209,9 @@ def HasV8_2aOps : SubtargetFeature<"v8.2
> def HasV8_3aOps : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true",
> "Support ARM v8.3a instructions", [HasV8_2aOps, FeatureRCPC]>;
>
> +def HasV8_4aOps : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
> + "Support ARM v8.4a instructions", [HasV8_3aOps, FeatureDotProd]>;
> +
> //===----------------------------------------------------------------------===//
> // Register File Description
> //===----------------------------------------------------------------------===//
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h Fri Jun 29 01:43:19 2018
> @@ -66,6 +66,7 @@ protected:
> bool HasV8_1aOps = false;
> bool HasV8_2aOps = false;
> bool HasV8_3aOps = false;
> + bool HasV8_4aOps = false;
>
> bool HasFPARMv8 = false;
> bool HasNEON = false;
> @@ -78,6 +79,14 @@ protected:
> bool HasPerfMon = false;
> bool HasFullFP16 = false;
> bool HasSPE = false;
> +
> + // ARMv8.4 Crypto extensions
> + bool HasSM4 = true;
> + bool HasSHA3 = true;
> +
> + bool HasSHA2 = true;
> + bool HasAES = true;
> +
> bool HasLSLFast = false;
> bool HasSVE = false;
> bool HasRCPC = false;
> @@ -201,6 +210,7 @@ public:
> bool hasV8_1aOps() const { return HasV8_1aOps; }
> bool hasV8_2aOps() const { return HasV8_2aOps; }
> bool hasV8_3aOps() const { return HasV8_3aOps; }
> + bool hasV8_4aOps() const { return HasV8_4aOps; }
>
> bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
>
> @@ -228,6 +238,10 @@ public:
> bool hasLSE() const { return HasLSE; }
> bool hasRAS() const { return HasRAS; }
> bool hasRDM() const { return HasRDM; }
> + bool hasSM4() const { return HasSM4; }
> + bool hasSHA3() const { return HasSHA3; }
> + bool hasSHA2() const { return HasSHA2; }
> + bool hasAES() const { return HasAES; }
> bool balanceFPOps() const { return BalanceFPOps; }
> bool predictableSelectIsExpensive() const {
> return PredictableSelectIsExpensive;
>
> Modified: llvm/trunk/lib/Target/ARM/ARM.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARM.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARM.td Fri Jun 29 01:43:19 2018
> @@ -109,10 +109,16 @@ def Feature8MSecExt : SubtargetFea
> "Enable support for ARMv8-M "
> "Security Extensions">;
>
> +def FeatureSHA2 : SubtargetFeature<"sha2", "HasSHA2", "true",
> + "Enable SHA1 and SHA256 support", [FeatureNEON]>;
> +
> +def FeatureAES : SubtargetFeature<"aes", "HasAES", "true",
> + "Enable AES support", [FeatureNEON]>;
> +
> def FeatureCrypto : SubtargetFeature<"crypto", "HasCrypto", "true",
> "Enable support for "
> "Cryptography extensions",
> - [FeatureNEON]>;
> + [FeatureNEON, FeatureSHA2, FeatureAES]>;
>
> def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true",
> "Enable support for CRC instructions">;
> @@ -419,6 +425,10 @@ def HasV8_3aOps : SubtargetFeature<"v8
> "Support ARM v8.3a instructions",
> [HasV8_2aOps]>;
>
> +def HasV8_4aOps : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
> + "Support ARM v8.4a instructions",
> + [HasV8_3aOps, FeatureDotProd]>;
> +
> //===----------------------------------------------------------------------===//
> // ARM Processor subtarget features.
> //
> @@ -624,6 +634,20 @@ def ARMv83a : Architecture<"armv8.3-a"
> FeatureCRC,
> FeatureRAS]>;
>
> +def ARMv84a : Architecture<"armv8.4-a", "ARMv84a", [HasV8_4aOps,
> + FeatureAClass,
> + FeatureDB,
> + FeatureFPARMv8,
> + FeatureNEON,
> + FeatureDSP,
> + FeatureTrustZone,
> + FeatureMP,
> + FeatureVirtualization,
> + FeatureCrypto,
> + FeatureCRC,
> + FeatureRAS,
> + FeatureDotProd]>;
> +
> def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
> FeatureRClass,
> FeatureDB,
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Jun 29 01:43:19 2018
> @@ -253,6 +253,8 @@ def HasV8_2a : Predicate<"Subtar
> AssemblerPredicate<"HasV8_2aOps", "armv8.2a">;
> def HasV8_3a : Predicate<"Subtarget->hasV8_3aOps()">,
> AssemblerPredicate<"HasV8_3aOps", "armv8.3a">;
> +def HasV8_4a : Predicate<"Subtarget->hasV8_4aOps()">,
> + AssemblerPredicate<"HasV8_4aOps", "armv8.4a">;
> def NoVFP : Predicate<"!Subtarget->hasVFP2()">;
> def HasVFP2 : Predicate<"Subtarget->hasVFP2()">,
> AssemblerPredicate<"FeatureVFP2", "VFP2">;
> @@ -267,6 +269,10 @@ def HasFPARMv8 : Predicate<"Subtar
> AssemblerPredicate<"FeatureFPARMv8", "FPARMv8">;
> def HasNEON : Predicate<"Subtarget->hasNEON()">,
> AssemblerPredicate<"FeatureNEON", "NEON">;
> +def HasSHA2 : Predicate<"Subtarget->hasSHA2()">,
> + AssemblerPredicate<"FeatureSHA2", "sha2">;
> +def HasAES : Predicate<"Subtarget->hasAES()">,
> + AssemblerPredicate<"FeatureAES", "aes">;
> def HasCrypto : Predicate<"Subtarget->hasCrypto()">,
> AssemblerPredicate<"FeatureCrypto", "crypto">;
> def HasDotProd : Predicate<"Subtarget->hasDotProd()">,
>
> Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Fri Jun 29 01:43:19 2018
> @@ -105,6 +105,7 @@ protected:
> ARMv81a,
> ARMv82a,
> ARMv83a,
> + ARMv84a,
> ARMv8a,
> ARMv8mBaseline,
> ARMv8mMainline,
> @@ -151,6 +152,7 @@ protected:
> bool HasV8_1aOps = false;
> bool HasV8_2aOps = false;
> bool HasV8_3aOps = false;
> + bool HasV8_4aOps = false;
> bool HasV8MBaselineOps = false;
> bool HasV8MMainlineOps = false;
>
> @@ -299,6 +301,12 @@ protected:
> /// Has8MSecExt - if true, processor supports ARMv8-M Security Extensions
> bool Has8MSecExt = false;
>
> + /// HasSHA2 - if true, processor supports SHA1 and SHA256
> + bool HasSHA2 = false;
> +
> + /// HasAES - if true, processor supports AES
> + bool HasAES = false;
> +
> /// HasCrypto - if true, processor supports Cryptography extensions
> bool HasCrypto = false;
>
> @@ -513,6 +521,7 @@ public:
> bool hasV8_1aOps() const { return HasV8_1aOps; }
> bool hasV8_2aOps() const { return HasV8_2aOps; }
> bool hasV8_3aOps() const { return HasV8_3aOps; }
> + bool hasV8_4aOps() const { return HasV8_4aOps; }
> bool hasV8MBaselineOps() const { return HasV8MBaselineOps; }
> bool hasV8MMainlineOps() const { return HasV8MMainlineOps; }
>
> @@ -538,6 +547,8 @@ public:
> bool hasVFP4() const { return HasVFPv4; }
> bool hasFPARMv8() const { return HasFPARMv8; }
> bool hasNEON() const { return HasNEON; }
> + bool hasSHA2() const { return HasSHA2; }
> + bool hasAES() const { return HasAES; }
> bool hasCrypto() const { return HasCrypto; }
> bool hasDotProd() const { return HasDotProd; }
> bool hasCRC() const { return HasCRC; }
>
> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp?rev=335953&r1=335952&r2=335953&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp Fri Jun 29 01:43:19 2018
> @@ -859,6 +859,8 @@ void ARMTargetELFStreamer::emitArchDefau
> case ARM::ArchKind::ARMV8A:
> case ARM::ArchKind::ARMV8_1A:
> case ARM::ArchKind::ARMV8_2A:
> + case ARM::ArchKind::ARMV8_3A:
> + case ARM::ArchKind::ARMV8_4A:
> setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
> setAttributeItem(ARM_ISA_use, Allowed, false);
> setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
>
>
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