[llvm] r335913 - [NVPTX] Delete dead code
Benjamin Kramer via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 28 13:05:35 PDT 2018
Author: d0k
Date: Thu Jun 28 13:05:35 2018
New Revision: 335913
URL: http://llvm.org/viewvc/llvm-project?rev=335913&view=rev
Log:
[NVPTX] Delete dead code
No functionality change.
Modified:
llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.h
llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.h
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp?rev=335913&r1=335912&r2=335913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp Thu Jun 28 13:05:35 2018
@@ -3630,12 +3630,6 @@ bool NVPTXDAGToDAGISel::SelectADDRri64(S
return SelectADDRri_imp(OpNode, Addr, Base, Offset, MVT::i64);
}
-// symbol
-bool NVPTXDAGToDAGISel::SelectADDRvar(SDNode *OpNode, SDValue Addr,
- SDValue &Value) {
- return SelectDirectAddr(Addr, Value);
-}
-
bool NVPTXDAGToDAGISel::ChkMemSDNodeAddressSpace(SDNode *N,
unsigned int spN) const {
const Value *Src = nullptr;
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.h?rev=335913&r1=335912&r2=335913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.h (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.h Thu Jun 28 13:05:35 2018
@@ -74,8 +74,6 @@ private:
bool tryConstantFP16(SDNode *N);
bool SelectSETP_F16X2(SDNode *N);
bool tryEXTRACT_VECTOR_ELEMENT(SDNode *N);
- bool tryWMMA_LDST(SDNode *N);
- bool tryWMMA_MMA(SDNode *N);
inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) {
return CurDAG->getTargetConstant(Imm, DL, MVT::i32);
@@ -96,7 +94,6 @@ private:
SDValue &Offset);
bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base,
SDValue &Offset);
- bool SelectADDRvar(SDNode *OpNode, SDValue Addr, SDValue &Value);
bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const;
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp?rev=335913&r1=335912&r2=335913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp Thu Jun 28 13:05:35 2018
@@ -70,51 +70,6 @@ void NVPTXInstrInfo::copyPhysReg(Machine
.addReg(SrcReg, getKillRegState(KillSrc));
}
-bool NVPTXInstrInfo::isMoveInstr(const MachineInstr &MI, unsigned &SrcReg,
- unsigned &DestReg) const {
- // Look for the appropriate part of TSFlags
- bool isMove = false;
-
- unsigned TSFlags =
- (MI.getDesc().TSFlags & NVPTX::SimpleMoveMask) >> NVPTX::SimpleMoveShift;
- isMove = (TSFlags == 1);
-
- if (isMove) {
- MachineOperand dest = MI.getOperand(0);
- MachineOperand src = MI.getOperand(1);
- assert(dest.isReg() && "dest of a movrr is not a reg");
- assert(src.isReg() && "src of a movrr is not a reg");
-
- SrcReg = src.getReg();
- DestReg = dest.getReg();
- return true;
- }
-
- return false;
-}
-
-bool NVPTXInstrInfo::isLoadInstr(const MachineInstr &MI,
- unsigned &AddrSpace) const {
- bool isLoad = false;
- unsigned TSFlags =
- (MI.getDesc().TSFlags & NVPTX::isLoadMask) >> NVPTX::isLoadShift;
- isLoad = (TSFlags == 1);
- if (isLoad)
- AddrSpace = getLdStCodeAddrSpace(MI);
- return isLoad;
-}
-
-bool NVPTXInstrInfo::isStoreInstr(const MachineInstr &MI,
- unsigned &AddrSpace) const {
- bool isStore = false;
- unsigned TSFlags =
- (MI.getDesc().TSFlags & NVPTX::isStoreMask) >> NVPTX::isStoreShift;
- isStore = (TSFlags == 1);
- if (isStore)
- AddrSpace = getLdStCodeAddrSpace(MI);
- return isStore;
-}
-
/// AnalyzeBranch - Analyze the branching code at the end of MBB, returning
/// true if it cannot be understood (e.g. it's a switch dispatch or isn't
/// implemented for a target). Upon success, this returns false and returns
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.h?rev=335913&r1=335912&r2=335913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.h (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.h Thu Jun 28 13:05:35 2018
@@ -52,10 +52,6 @@ public:
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- virtual bool isMoveInstr(const MachineInstr &MI, unsigned &SrcReg,
- unsigned &DestReg) const;
- bool isLoadInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
- bool isStoreInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
// Branch analysis.
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
@@ -68,10 +64,6 @@ public:
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;
- unsigned getLdStCodeAddrSpace(const MachineInstr &MI) const {
- return MI.getOperand(2).getImm();
- }
-
};
} // namespace llvm
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.h?rev=335913&r1=335912&r2=335913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.h (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.h Thu Jun 28 13:05:35 2018
@@ -74,7 +74,6 @@ public:
bool hasAtomBitwise64() const { return SmVersion >= 32; }
bool hasAtomMinMax64() const { return SmVersion >= 32; }
bool hasLDG() const { return SmVersion >= 32; }
- bool hasLDU() const { return ((SmVersion >= 20) && (SmVersion < 30)); }
inline bool hasHWROT32() const { return SmVersion >= 32; }
bool hasImageHandles() const;
bool hasFP16Math() const { return SmVersion >= 53; }
More information about the llvm-commits
mailing list