[PATCH] D26359: Use LiveRangeCalc to extend live ranges in shrinkToUses

[Scott Linder via Phabricator via llvm-commits]

scott.linder added a comment.

Here is the simplified LIS in my case just before the assert. The failing SubRange is %8273.L00000001 which I believe is %8273.sub0

If I understand this correctly, LIS claims %8273.sub0 is live-in bb.4 due to the SPILL, and live-out bb.0 due to the undef, but for some reason is not live-through bb.2/bb.3

SubRange0.getVNInfoBefore(bb.4) then returns the correct VNInfo for bb.0, but returns nullptr for bb.3 and we hit the assert.

Is my understanding correct? If so, I can try to identify why L00000001 does not have live-through segments for bb.2 and bb.3

  ********** INTERVALS **********
  %8273 [336r,368r:0)[368r,1872B:1)[5760r,6360B:2)[10000r,11040B:3)[11040B,13560B:4)[13560B,13584r:5)  0 at 336r 1 at 368r 2 at 5760r 3 at 10000r 4 at 11040B-phi 5 at 13560B-phi L00000002 [368r,1872B:0)[5760r,6360B:3)[10000r,11040B:4)[11040B,13560B:5)[13560B,13576r:2)  0 at 368r 1 at x 2 at 13560B-phi 3 at 5760r 4 at 10000r 5 at 11040B-phi L00000001 [336r,1872B:0)[13560B,13584r:0)  0 at 336r weight:1.116891e-03
  RegMasks: 128r
  ********** MACHINEINSTRS **********
  # Machine code for function quux: NoPHIs, TracksLiveness
  0B	bb.0.bb:
  	  successors: %bb.1(0x40000000), %bb.4(0x40000000); %bb.1(50.00%), %bb.4(50.00%)
  
  336B	  undef %8273.sub0:vreg_64 = V_MUL_LO_I32 %4451.sub0:vreg_64, %350:sreg_32_xm0, implicit $exec
  368B	  %8273.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
  416B	  %4457:vreg_64 = V_LSHLREV_B64 4, %8273:vreg_64, implicit $exec
  1760B	  %7986:vgpr_32 = COPY %8273.sub1:vreg_64
  
  1872B	bb.1.bb30:
  	; predecessors: %bb.0
  	  successors: %bb.2(0x40000000), %bb.3(0x40000000); %bb.2(50.00%), %bb.3(50.00%)
  
  5760B	  undef %8273.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
  10000B	  undef %8273.sub1:vreg_64 = V_MOV_B32_e32 -1, implicit $exec
  
  6360B	bb.2.bb99:
  	; predecessors: %bb.1
  	  successors: %bb.3(0x80000000); %bb.3(200.00%)
  
  11040B	bb.3.Flow308:
  	; predecessors: %bb.1, %bb.2
  	  successors: %bb.4(0x80000000); %bb.4(200.00%)
  
  13560B	bb.4.bb195:
  	; predecessors: %bb.0, %bb.3
  	  successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(50.00%), %bb.6(50.00%)
  
  13576B	  SI_SPILL_V64_SAVE %8273:vreg_64, %stack.26, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr101, 0, implicit $exec :: (store 8 into %stack.26, align 4, addrspace 5)
  
  26508B	bb.5.bb652:
  	; predecessors: %bb.4
  	  successors: %bb.6(0x80000000); %bb.6(200.00%)
  
  30848B	bb.6.bb733:
  	; predecessors: %bb.4, %bb.5
  	  successors: %bb.9(0x40000000), %bb.7(0x40000000); %bb.9(50.00%), %bb.7(50.00%)
  
  30872B	  %8274:vreg_64 = SI_SPILL_V64_RESTORE %stack.26, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr101, 0, implicit $exec :: (load 8 from %stack.26, align 4, addrspace 5)
  
  31472B	bb.7.Flow:
  	; predecessors: %bb.6, %bb.9
  	  successors: %bb.8(0x40000000), %bb.10(0x40000000); %bb.8(50.00%), %bb.10(50.00%)
  
  31568B	bb.8.bb767:
  	; predecessors: %bb.7
  	  successors: %bb.10(0x80000000); %bb.10(200.00%)
  
  31600B	bb.9.bb768:
  	; predecessors: %bb.6
  	  successors: %bb.7(0x80000000); %bb.7(200.00%)
  
  60988B	bb.10.UnifiedUnreachableBlock:
  	; predecessors: %bb.7, %bb.8
  
  
  # End machine code for function quux.


Repository:
  rL LLVM

https://reviews.llvm.org/D26359