[PATCH] D48692: [WebAssembly] Delete vector sdiv test case
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 28 10:43:41 PDT 2018
RKSimon added a comment.
In https://reviews.llvm.org/D48692#1146943, @aheejin wrote:
> Thanks. I'm little not sure if you remember the history, so FYI, this test case was added in https://reviews.llvm.org/D46161 (https://reviews.llvm.org/rL329525) to make sure the case with 1's in a vector should NOT be converted to 'shr's and remain as 'sdiv's, in which case shifting a value by the number of its bit widths becomes undef. But after https://reviews.llvm.org/rL335727, you fixed it so now even vectors with 1's in there can be correctly treated as pow2 non-splat vectors, so this test started failing. So in https://reviews.llvm.org/rL335771 someone else (not me) fixed the expectation to 'shr's, so the purpose this case was added is now unnecessary.
>
> Do you mean, even if the original purpose of this case is not there anymore, it's still better to keep this case after modifying the comments?
I think I've fixed the test for you now at https://reviews.llvm.org/rL335884 - the test now passes again, so you can probably safely keep it. I'd recommend updating the checks to check the (immediate) shift amounts if that is possible - to ensure they match the 3 'real' divisors.
Repository:
rL LLVM
https://reviews.llvm.org/D48692
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