[llvm] r335737 - [AArch64] Reverting FP16 vcvth_n_s64_f16 to fix

[Luke Geeson via llvm-commits]

Author: lukegeeson
Date: Wed Jun 27 07:34:40 2018
New Revision: 335737

URL: http://llvm.org/viewvc/llvm-project?rev=335737&view=rev
Log:
[AArch64] Reverting FP16 vcvth_n_s64_f16 to fix

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
    llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td?rev=335737&r1=335736&r2=335737&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td Wed Jun 27 07:34:40 2018
@@ -4979,8 +4979,6 @@ def : Pat<(f16 (int_aarch64_neon_vcvtfxs
           (SCVTFh (EXTRACT_SUBREG FPR32:$Rn, hsub), vecshiftR16:$imm)>;
 def : Pat<(f16 (int_aarch64_neon_vcvtfxs2fp (i32 FPR32:$Rn), vecshiftR16:$imm)),
           (SCVTFh (EXTRACT_SUBREG FPR32:$Rn, hsub), vecshiftR16:$imm)>;
-def : Pat<(f16 (int_aarch64_neon_vcvtfxs2fp (i64 FPR64:$Rn), vecshiftR16:$imm)),
-          (SCVTFh (EXTRACT_SUBREG FPR64:$Rn, hsub), vecshiftR16:$imm)>;
 def : Pat<(f16 (int_aarch64_neon_vcvtfxu2fp
             (and FPR32:$Rn, (i32 65535)),
             vecshiftR16:$imm)),

Modified: llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll?rev=335737&r1=335736&r2=335737&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll Wed Jun 27 07:34:40 2018
@@ -176,26 +176,6 @@ entry:
   ret half %vcvth_n_f16_s32
 }
 
-define dso_local half @test_vcvth_n_f16_s64_1(i64 %a) {
-; CHECK-LABEL: test_vcvth_n_f16_s64_1:
-; CHECK:         fmov d0, x0
-; CHECK-NEXT:    scvtf h0, h0, #1
-; CHECK-NEXT:    ret
-entry:
-  %vcvth_n_f16_s64 = tail call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i64(i64 %a, i32 1)
-  ret half %vcvth_n_f16_s64
-}
-
-define dso_local half @test_vcvth_n_f16_s64_16(i64 %a) {
-; CHECK-LABEL: test_vcvth_n_f16_s64_16:
-; CHECK:         fmov d0, x0
-; CHECK-NEXT:    scvtf h0, h0, #16
-; CHECK-NEXT:    ret
-entry:
-  %vcvth_n_f16_s64 = tail call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i64(i64 %a, i32 16)
-  ret half %vcvth_n_f16_s64
-}
-
 define dso_local i16 @test_vcvth_n_s16_f16_1(half %a) {
 ; CHECK-LABEL: test_vcvth_n_s16_f16_1:
 ; CHECK:         fcvtzs h0, h0, #1