[llvm] r335706 - AMDHSA: Rename RESERVED -> RESERVED0, mark gfx9-specific field

Konstantin Zhuravlyov via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 26 22:18:50 PDT 2018


Author: kzhuravl
Date: Tue Jun 26 22:18:50 2018
New Revision: 335706

URL: http://llvm.org/viewvc/llvm-project?rev=335706&view=rev
Log:
AMDHSA: Rename RESERVED -> RESERVED0, mark gfx9-specific field

Modified:
    llvm/trunk/include/llvm/Support/AMDHSAKernelDescriptor.h

Modified: llvm/trunk/include/llvm/Support/AMDHSAKernelDescriptor.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/AMDHSAKernelDescriptor.h?rev=335706&r1=335705&r2=335706&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/AMDHSAKernelDescriptor.h (original)
+++ llvm/trunk/include/llvm/Support/AMDHSAKernelDescriptor.h Tue Jun 26 22:18:50 2018
@@ -89,8 +89,8 @@ enum : int32_t {
   COMPUTE_PGM_RSRC1(ENABLE_IEEE_MODE, 23, 1),
   COMPUTE_PGM_RSRC1(BULKY, 24, 1),
   COMPUTE_PGM_RSRC1(CDBG_USER, 25, 1),
-  COMPUTE_PGM_RSRC1(FP16_OVFL, 26, 1),
-  COMPUTE_PGM_RSRC1(RESERVED, 27, 5),
+  COMPUTE_PGM_RSRC1(FP16_OVFL, 26, 1), // GFX9+
+  COMPUTE_PGM_RSRC1(RESERVED0, 27, 5),
 };
 #undef COMPUTE_PGM_RSRC1
 
@@ -116,7 +116,7 @@ enum : int32_t {
   COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW, 28, 1),
   COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_INEXACT, 29, 1),
   COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO, 30, 1),
-  COMPUTE_PGM_RSRC2(RESERVED, 31, 1),
+  COMPUTE_PGM_RSRC2(RESERVED0, 31, 1),
 };
 #undef COMPUTE_PGM_RSRC2
 
@@ -131,7 +131,7 @@ enum : int32_t {
   KERNEL_CODE_PROPERTY(ENABLE_SGPR_DISPATCH_ID, 4, 1),
   KERNEL_CODE_PROPERTY(ENABLE_SGPR_FLAT_SCRATCH_INIT, 5, 1),
   KERNEL_CODE_PROPERTY(ENABLE_SGPR_PRIVATE_SEGMENT_SIZE, 6, 1),
-  KERNEL_CODE_PROPERTY(RESERVED, 7, 9),
+  KERNEL_CODE_PROPERTY(RESERVED0, 7, 9),
 };
 #undef KERNEL_CODE_PROPERTY
 




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