[llvm] r335637 - [DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 vector expansion (PR37119)

[Simon Pilgrim via llvm-commits]

On 26/06/2018 19:39, Friedman, Eli wrote:

> On 6/26/2018 10:46 AM, Simon Pilgrim via llvm-commits wrote:
>> Author: rksimon
>> Date: Tue Jun 26 10:46:51 2018
>> New Revision: 335637
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=335637&view=rev
>> Log:
>> [DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 vector 
>> expansion (PR37119)
>>
>> Temporary fix until I've managed to get D45806 updated - both +1 and 
>> -1 special cases need to be properly supported.
>>
>> Modified:
>>      llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>>      llvm/trunk/test/CodeGen/X86/combine-sdiv.ll
>>
>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>> URL: 
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=335637&r1=335636&r2=335637&view=diff
>> ============================================================================== 
>>
>> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Jun 26 
>> 10:46:51 2018
>> @@ -3051,6 +3051,8 @@ SDValue DAGCombiner::visitSDIV(SDNode *N
>>       // == 1)
>>       if (C->getAPIntValue().isOneValue())
>>         return false;
>> +    if (C->getAPIntValue().isAllOnesValue())
>> +      return false;
>
> While you're here, could also add "if 
> (C->getAPIntValue().isMinSignedValue()) return false;", to fix 
> https://bugs.llvm.org/show_bug.cgi?id=37569 ?
No problem, I'll address that as well.