[PATCH] D48586: [AMDGPU] Early expansion of 32 bit udiv/urem

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In https://reviews.llvm.org/D48586#1143289, @arsenm wrote:

> In https://reviews.llvm.org/D48586#1143253, @rampitec wrote:
>
> > In https://reviews.llvm.org/D48586#1143245, @arsenm wrote:
> >
> > > Probably should add an update_test_checks test for the full expnasions
> >
> >
> > Probably for scalar cases only. Vectors with scheduler are too unstable. Even scalar will fluctuate with scheduler and RA. Do you think it makes sense to have a separate set of scalar cases?
>
>
> It's a single IR pass expansion, the scheduler isn't involved


So you mean to do this for the IR, not the final ISA? Ok.


https://reviews.llvm.org/D48586