[llvm] r335562 - foo
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 25 18:38:48 PDT 2018
This was supposed to have been squashed with the commit after it. I have
reverted it in r335566 to squash into one commit.
~Craig
On Mon, Jun 25, 2018 at 5:48 PM Craig Topper via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
> Author: ctopper
> Date: Mon Jun 25 17:43:34 2018
> New Revision: 335562
>
> URL: http://llvm.org/viewvc/llvm-project?rev=335562&view=rev
> Log:
> foo
>
> Modified:
> llvm/trunk/include/llvm/IR/IntrinsicsX86.td
> llvm/trunk/lib/IR/AutoUpgrade.cpp
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>
> Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=335562&r1=335561&r2=335562&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)
> +++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Mon Jun 25 17:43:34 2018
> @@ -1251,28 +1251,22 @@ let TargetPrefix = "x86" in { // All in
> llvm_v4i64_ty], [IntrNoMem]>;
>
> def int_x86_avx512_mask_fpclass_pd_128 :
> - GCCBuiltin<"__builtin_ia32_fpclasspd128_mask">,
> - Intrinsic<[llvm_i8_ty], [llvm_v2f64_ty, llvm_i32_ty,
> llvm_i8_ty],
> + Intrinsic<[llvm_v2i1_ty], [llvm_v2f64_ty, llvm_i32_ty],
> [IntrNoMem]>;
> def int_x86_avx512_mask_fpclass_pd_256 :
> - GCCBuiltin<"__builtin_ia32_fpclasspd256_mask">,
> - Intrinsic<[llvm_i8_ty], [llvm_v4f64_ty, llvm_i32_ty,
> llvm_i8_ty],
> + Intrinsic<[llvm_v4i1_ty], [llvm_v4f64_ty, llvm_i32_ty],
> [IntrNoMem]>;
> def int_x86_avx512_mask_fpclass_pd_512 :
> - GCCBuiltin<"__builtin_ia32_fpclasspd512_mask">,
> - Intrinsic<[llvm_i8_ty], [llvm_v8f64_ty, llvm_i32_ty,
> llvm_i8_ty],
> + Intrinsic<[llvm_v8i1_ty], [llvm_v8f64_ty, llvm_i32_ty],
> [IntrNoMem]>;
> def int_x86_avx512_mask_fpclass_ps_128 :
> - GCCBuiltin<"__builtin_ia32_fpclassps128_mask">,
> - Intrinsic<[llvm_i8_ty], [llvm_v4f32_ty, llvm_i32_ty,
> llvm_i8_ty],
> + Intrinsic<[llvm_v4i1_ty], [llvm_v4f32_ty, llvm_i32_ty],
> [IntrNoMem]>;
> def int_x86_avx512_mask_fpclass_ps_256 :
> - GCCBuiltin<"__builtin_ia32_fpclassps256_mask">,
> - Intrinsic<[llvm_i8_ty], [llvm_v8f32_ty, llvm_i32_ty,
> llvm_i8_ty],
> + Intrinsic<[llvm_v8i1_ty], [llvm_v8f32_ty, llvm_i32_ty],
> [IntrNoMem]>;
> def int_x86_avx512_mask_fpclass_ps_512 :
> - GCCBuiltin<"__builtin_ia32_fpclassps512_mask">,
> - Intrinsic<[llvm_i16_ty], [llvm_v16f32_ty, llvm_i32_ty,
> llvm_i16_ty],
> + Intrinsic<[llvm_v16i1_ty], [llvm_v16f32_ty, llvm_i32_ty],
> [IntrNoMem]>;
> def int_x86_avx512_mask_fpclass_sd :
> GCCBuiltin<"__builtin_ia32_fpclasssd_mask">,
>
> Modified: llvm/trunk/lib/IR/AutoUpgrade.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/AutoUpgrade.cpp?rev=335562&r1=335561&r2=335562&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/IR/AutoUpgrade.cpp (original)
> +++ llvm/trunk/lib/IR/AutoUpgrade.cpp Mon Jun 25 17:43:34 2018
> @@ -406,6 +406,24 @@ static bool UpgradeX86IntrinsicFunction(
> if (Name == "avx512.mask.cmp.ps.512") // Added in 7.0
> return UpgradeX86MaskedFPCompare(F,
> Intrinsic::x86_avx512_mask_cmp_ps_512,
> NewFn);
> + if (Name == "avx512.mask.fpclass.pd.128") // Added in 7.0
> + return UpgradeX86MaskedFPCompare(F,
> Intrinsic::x86_avx512_mask_fpclass_pd_128,
> + NewFn);
> + if (Name == "avx512.mask.fpclass.pd.256") // Added in 7.0
> + return UpgradeX86MaskedFPCompare(F,
> Intrinsic::x86_avx512_mask_fpclass_pd_256,
> + NewFn);
> + if (Name == "avx512.mask.fpclass.pd.512") // Added in 7.0
> + return UpgradeX86MaskedFPCompare(F,
> Intrinsic::x86_avx512_mask_fpclass_pd_512,
> + NewFn);
> + if (Name == "avx512.mask.fpclass.ps.128") // Added in 7.0
> + return UpgradeX86MaskedFPCompare(F,
> Intrinsic::x86_avx512_mask_fpclass_ps_128,
> + NewFn);
> + if (Name == "avx512.mask.fpclass.ps.256") // Added in 7.0
> + return UpgradeX86MaskedFPCompare(F,
> Intrinsic::x86_avx512_mask_fpclass_ps_256,
> + NewFn);
> + if (Name == "avx512.mask.fpclass.ps.512") // Added in 7.0
> + return UpgradeX86MaskedFPCompare(F,
> Intrinsic::x86_avx512_mask_fpclass_ps_512,
> + NewFn);
>
> // frcz.ss/sd may need to have an argument dropped. Added in 3.2
> if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) {
> @@ -3116,6 +3134,31 @@ void llvm::UpgradeIntrinsicCall(CallInst
> NumElts);
>
> std::string Name = CI->getName();
> + if (!Name.empty()) {
> + CI->setName(Name + ".old");
> + NewCall->setName(Name);
> + }
> + CI->replaceAllUsesWith(Res);
> + CI->eraseFromParent();
> + return;
> + }
> +
> + case Intrinsic::x86_avx512_mask_fpclass_pd_128:
> + case Intrinsic::x86_avx512_mask_fpclass_pd_256:
> + case Intrinsic::x86_avx512_mask_fpclass_pd_512:
> + case Intrinsic::x86_avx512_mask_fpclass_ps_128:
> + case Intrinsic::x86_avx512_mask_fpclass_ps_256:
> + case Intrinsic::x86_avx512_mask_fpclass_ps_512: {
> + SmallVector<Value *, 4> Args;
> + Args.push_back(CI->getArgOperand(0));
> + Args.push_back(CI->getArgOperand(1));
> +
> + NewCall = Builder.CreateCall(NewFn, Args);
> + unsigned NumElts = Args[0]->getType()->getVectorNumElements();
> + Value *Res = ApplyX86MaskOn1BitsVec(Builder, NewCall,
> CI->getArgOperand(2),
> + NumElts);
> +
> + std::string Name = CI->getName();
> if (!Name.empty()) {
> CI->setName(Name + ".old");
> NewCall->setName(Name);
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=335562&r1=335561&r2=335562&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 25 17:43:34 2018
> @@ -20748,23 +20748,11 @@ SDValue X86TargetLowering::LowerINTRINSI
> Mask, PassThru, Subtarget, DAG);
> }
> case FPCLASS: {
> - // FPclass intrinsics with mask
> - SDValue Src1 = Op.getOperand(1);
> - MVT VT = Src1.getSimpleValueType();
> - MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements());
> - SDValue Imm = Op.getOperand(2);
> - SDValue Mask = Op.getOperand(3);
> - MVT BitcastVT = MVT::getVectorVT(MVT::i1,
> -
> Mask.getSimpleValueType().getSizeInBits());
> - SDValue FPclass = DAG.getNode(IntrData->Opc0, dl, MaskVT, Src1,
> Imm);
> - SDValue FPclassMask = getVectorMaskingNode(FPclass, Mask,
> SDValue(),
> - Subtarget, DAG);
> - // Need to fill with zeros to ensure the bitcast will produce
> zeroes
> - // for the upper bits in the v2i1/v4i1 case.
> - SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, BitcastVT,
> - DAG.getConstant(0, dl, BitcastVT),
> - FPclassMask, DAG.getIntPtrConstant(0,
> dl));
> - return DAG.getBitcast(Op.getValueType(), Res);
> + // FPclass intrinsics
> + SDValue Src1 = Op.getOperand(1);
> + MVT MaskVT = Op.getSimpleValueType();
> + SDValue Imm = Op.getOperand(2);
> + return DAG.getNode(IntrData->Opc0, dl, MaskVT, Src1, Imm);
> }
> case FPCLASSS: {
> SDValue Src1 = Op.getOperand(1);
> @@ -20808,8 +20796,7 @@ SDValue X86TargetLowering::LowerINTRINSI
> }
>
> case CMP_MASK_CC: {
> - MVT VT = Op.getOperand(1).getSimpleValueType();
> - MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements());
> + MVT MaskVT = Op.getSimpleValueType();
> SDValue Cmp;
> SDValue CC = Op.getOperand(3);
> CC = DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, CC);
>
>
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