[llvm] r335514 - [PowerPC] Fix incorrectly encoded wait instruction
Lei Huang via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 25 12:28:27 PDT 2018
Author: lei
Date: Mon Jun 25 12:28:27 2018
New Revision: 335514
URL: http://llvm.org/viewvc/llvm-project?rev=335514&view=rev
Log:
[PowerPC] Fix incorrectly encoded wait instruction
Encoding for the wait instruction was wrong. Fix according to ISA 3.0.
Differential Revision: https://reviews.llvm.org/D48550
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=335514&r1=335513&r2=335514&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Jun 25 12:28:27 2018
@@ -3807,7 +3807,7 @@ def ICBI : XForm_1a<31, 982, (outs), (in
def EnforceIEIO : XForm_24_eieio<31, 854, (outs), (ins),
"eieio", IIC_LdStLoad, []>;
-def WAIT : XForm_24_sync<31, 62, (outs), (ins i32imm:$L),
+def WAIT : XForm_24_sync<31, 30, (outs), (ins i32imm:$L),
"wait $L", IIC_LdStLoad, []>;
def MBAR : XForm_mbar<31, 854, (outs), (ins u5imm:$MO),
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt?rev=335514&r1=335513&r2=335514&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt Mon Jun 25 12:28:27 2018
@@ -46,7 +46,7 @@
0x7c 0x00 0x06 0xac
# CHECK: waitimpl
-0x7c 0x40 0x00 0x7c
+0x7c 0x40 0x00 0x3c
# CHECK: mbar 1
0x7c 0x20 0x06 0xac
@@ -103,13 +103,13 @@
0x7c 0x40 0x04 0xac
# CHECK: wait
-0x7c 0x00 0x00 0x7c
+0x7c 0x00 0x00 0x3c
# CHECK: waitrsv
-0x7c 0x20 0x00 0x7c
+0x7c 0x20 0x00 0x3c
# CHECK: waitimpl
-0x7c 0x40 0x00 0x7c
+0x7c 0x40 0x00 0x3c
# CHECK: mftb 2, 123
0x7c 0x5b 0x1a 0xe6
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s?rev=335514&r1=335513&r2=335514&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s Mon Jun 25 12:28:27 2018
@@ -97,8 +97,8 @@
# CHECK-BE: eieio # encoding: [0x7c,0x00,0x06,0xac]
# CHECK-LE: eieio # encoding: [0xac,0x06,0x00,0x7c]
eieio
-# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x7c]
-# CHECK-LE: waitimpl # encoding: [0x7c,0x00,0x40,0x7c]
+# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x3c]
+# CHECK-LE: waitimpl # encoding: [0x3c,0x00,0x40,0x7c]
wait 2
# CHECK-BE: mbar 1 # encoding: [0x7c,0x20,0x06,0xac]
# CHECK-LE: mbar 1 # encoding: [0xac,0x06,0x20,0x7c]
@@ -171,14 +171,14 @@
# CHECK-LE: ptesync # encoding: [0xac,0x04,0x40,0x7c]
ptesync
-# CHECK-BE: wait # encoding: [0x7c,0x00,0x00,0x7c]
-# CHECK-LE: wait # encoding: [0x7c,0x00,0x00,0x7c]
+# CHECK-BE: wait # encoding: [0x7c,0x00,0x00,0x3c]
+# CHECK-LE: wait # encoding: [0x3c,0x00,0x00,0x7c]
wait
-# CHECK-BE: waitrsv # encoding: [0x7c,0x20,0x00,0x7c]
-# CHECK-LE: waitrsv # encoding: [0x7c,0x00,0x20,0x7c]
+# CHECK-BE: waitrsv # encoding: [0x7c,0x20,0x00,0x3c]
+# CHECK-LE: waitrsv # encoding: [0x3c,0x00,0x20,0x7c]
waitrsv
-# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x7c]
-# CHECK-LE: waitimpl # encoding: [0x7c,0x00,0x40,0x7c]
+# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x3c]
+# CHECK-LE: waitimpl # encoding: [0x3c,0x00,0x40,0x7c]
waitimpl
# Time base instructions
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