[PATCH] D48546: [CodeGen] Ensure split interval has valid ranges for all sub registers

[Krzysztof Parzyszek via Phabricator via llvm-commits]

kparzysz added inline comments.


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Comment at: lib/CodeGen/SplitKit.cpp:1392
+      // defs <def, read-undef> that don't define the subrange lane, or are
+      // IMPLICIT_DEFs - this is a corner case extension to the previous case
+      if (LI.isSubRangeUndefined(S.LaneMask, MRI, *LIS.getSlotIndexes()))
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This situation is actually legitimate, and the existing code should be handling this already.  It seems like the assertion itself may be incorrect.


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Comment at: test/CodeGen/AMDGPU/subreg-split-live-in-error.mir:45
+name:            _amdgpu_ps_main
+alignment:       0
+exposesReturnsTwice: false
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Please reduce .mir testcases. Most of this stuff is unnecessary, the register classes in particular.


Repository:
  rL LLVM

https://reviews.llvm.org/D48546