[llvm] r335436 - [X86] Remove the changes to combineScalarToVector made in r335037.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sun Jun 24 17:21:53 2018
New Revision: 335436

URL: http://llvm.org/viewvc/llvm-project?rev=335436&view=rev
Log:
[X86] Remove the changes to combineScalarToVector made in r335037.

They appear to be untested other than the test case for p37879.ll and I believe we should be using SimplifyDemandedElts here to handle these cases.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/pr37879.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=335436&r1=335435&r2=335436&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Jun 24 17:21:53 2018
@@ -39226,32 +39226,9 @@ static SDValue combineScalarToVector(SDN
   // TODO: SimplifyDemandedBits instead?
   if (VT == MVT::v1i1 && Src.getOpcode() == ISD::AND && Src.hasOneUse())
     if (auto *C = dyn_cast<ConstantSDNode>(Src.getOperand(1)))
-      if (C->getAPIntValue().isOneValue()) {
-        SDValue Mask = Src.getOperand(0);
-        if (Mask.getOpcode() == ISD::TRUNCATE &&
-            (Mask.getOperand(0).getValueType() == MVT::i8 ||
-             Mask.getOperand(0).getValueType() == MVT::i32))
-          Mask = Mask.getOperand(0);
-        return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), MVT::v1i1, Mask);
-      }
-
-  // The result of AND may also be truncated. This occurs in code for lowered
-  // masked scalar intrinsics.
-  if (VT == MVT::v1i1 && Src.getOpcode() == ISD::TRUNCATE && Src.hasOneUse() &&
-      Src.getOperand(0).getOpcode() == ISD::AND &&
-      Src.getOperand(0).hasOneUse())
-    if (auto *C = dyn_cast<ConstantSDNode>(Src.getOperand(0).getOperand(1)))
-      if (C->getAPIntValue().isOneValue()) {
-        SDValue Mask = Src.getOperand(0).getOperand(0);
-        if (Mask.getOpcode() == ISD::TRUNCATE &&
-            (Mask.getOperand(0).getValueType() == MVT::i8 ||
-             Mask.getOperand(0).getValueType() == MVT::i32))
-          Mask = Mask.getOperand(0);
-        // Check if the initial value is of a legal type for scalar_to_vector.
-        if (Mask.getValueType() != MVT::i8 && Mask.getValueType() != MVT::i32)
-          return SDValue();
-        return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), MVT::v1i1, Mask);
-      }
+      if (C->getAPIntValue().isOneValue())
+        return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), MVT::v1i1,
+                           Src.getOperand(0));
 
   return SDValue();
 }

Modified: llvm/trunk/test/CodeGen/X86/pr37879.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr37879.ll?rev=335436&r1=335435&r2=335436&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr37879.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr37879.ll Sun Jun 24 17:21:53 2018
@@ -6,8 +6,10 @@ define double @foo(i32** nocapture reado
 ; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    movq (%rax), %rax
 ; CHECK-NEXT:    vcvtsi2sdq %rax, %xmm0, %xmm1
-; CHECK-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT:    ## kill: def $eax killed $eax killed $rax
+; CHECK-NEXT:    andl $1, %eax
 ; CHECK-NEXT:    kmovd %eax, %k1
+; CHECK-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
 ; CHECK-NEXT:    vmovsd %xmm1, %xmm0, %xmm0 {%k1}
 ; CHECK-NEXT:    retq
   %2 = load i64, i64* undef, align 8