[llvm] r335395 - [PowerPC] add more tests for bit hacking opportunities with setcc; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Fri Jun 22 15:06:33 2018
New Revision: 335395

URL: http://llvm.org/viewvc/llvm-project?rev=335395&view=rev
Log:
[PowerPC] add more tests for bit hacking opportunities with setcc; NFC

Missed cases where the input and output are the same size in rL335390.

Modified:
    llvm/trunk/test/CodeGen/PowerPC/bool-math.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/bool-math.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/bool-math.ll?rev=335395&r1=335394&r2=335395&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/bool-math.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/bool-math.ll Fri Jun 22 15:06:33 2018
@@ -1,6 +1,20 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=powerpc64le-- -verify-machineinstrs | FileCheck %s
 
+define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
+; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    nor 3, 3, 3
+; CHECK-NEXT:    clrlwi 3, 3, 31
+; CHECK-NEXT:    subfic 3, 3, -27
+; CHECK-NEXT:    blr
+  %a = and i32 %x, 1
+  %c = icmp eq i32 %a, 0
+  %z = zext i1 %c to i32
+  %r = sub i32 -27, %z
+  ret i32 %r
+}
+
 define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
 ; CHECK-LABEL: sub_zext_cmp_mask_wider_result:
 ; CHECK:       # %bb.0:
@@ -29,6 +43,21 @@ define i8 @sub_zext_cmp_mask_narrower_re
   ret i8 %r
 }
 
+define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
+; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xori 3, 3, 65535
+; CHECK-NEXT:    xoris 3, 3, 65535
+; CHECK-NEXT:    clrldi 3, 3, 63
+; CHECK-NEXT:    ori 3, 3, 26
+; CHECK-NEXT:    blr
+  %a = and i8 %x, 1
+  %c = icmp eq i8 %a, 0
+  %z = zext i1 %c to i8
+  %r = add i8 %z, 26
+  ret i8 %r
+}
+
 define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
 ; CHECK-LABEL: add_zext_cmp_mask_wider_result:
 ; CHECK:       # %bb.0:
@@ -59,6 +88,19 @@ define i8 @add_zext_cmp_mask_narrower_re
   ret i8 %r
 }
 
+define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
+; CHECK-LABEL: low_bit_select_constants_bigger_false_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    not 3, 3
+; CHECK-NEXT:    clrldi 3, 3, 63
+; CHECK-NEXT:    subfic 3, 3, 43
+; CHECK-NEXT:    blr
+  %a = and i32 %x, 1
+  %c = icmp eq i32 %a, 0
+  %r = select i1 %c, i32 42, i32 43
+  ret i32 %r
+}
+
 define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
 ; CHECK-LABEL: low_bit_select_constants_bigger_false_wider_result:
 ; CHECK:       # %bb.0:
@@ -85,6 +127,21 @@ define i16 @low_bit_select_constants_big
   ret i16 %r
 }
 
+define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
+; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xori 3, 3, 65535
+; CHECK-NEXT:    xoris 3, 3, 65535
+; CHECK-NEXT:    clrldi 3, 3, 63
+; CHECK-NEXT:    ori 3, 3, 65506
+; CHECK-NEXT:    oris 3, 3, 65535
+; CHECK-NEXT:    blr
+  %a = and i8 %x, 1
+  %c = icmp eq i8 %a, 0
+  %r = select i1 %c, i8 227, i8 226
+  ret i8 %r
+}
+
 define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
 ; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
 ; CHECK:       # %bb.0: