[llvm] r335388 - [GISel]: Add G_ADDRSPACE_CAST Opcode

[Aditya Nandakumar via llvm-commits]

Author: aditya_nandakumar
Date: Fri Jun 22 13:58:51 2018
New Revision: 335388

URL: http://llvm.org/viewvc/llvm-project?rev=335388&view=rev
Log:
[GISel]: Add G_ADDRSPACE_CAST Opcode

Added IRTranslator support for addrspacecast.

https://reviews.llvm.org/D48469

reviewed by: volkan

Modified:
    llvm/trunk/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    llvm/trunk/include/llvm/Support/TargetOpcodes.def
    llvm/trunk/include/llvm/Target/GenericOpcodes.td
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/IRTranslator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/IRTranslator.h?rev=335388&r1=335387&r2=335388&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/IRTranslator.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/IRTranslator.h Fri Jun 22 13:58:51 2018
@@ -423,7 +423,7 @@ private:
     return false;
   }
   bool translateAddrSpaceCast(const User &U, MachineIRBuilder &MIRBuilder) {
-    return false;
+    return translateCast(TargetOpcode::G_ADDRSPACE_CAST, U, MIRBuilder);
   }
   bool translateCleanupPad(const User &U, MachineIRBuilder &MIRBuilder) {
     return false;

Modified: llvm/trunk/include/llvm/Support/TargetOpcodes.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetOpcodes.def?rev=335388&r1=335387&r2=335388&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/TargetOpcodes.def (original)
+++ llvm/trunk/include/llvm/Support/TargetOpcodes.def Fri Jun 22 13:58:51 2018
@@ -467,6 +467,9 @@ HANDLE_TARGET_OPCODE(G_SHUFFLE_VECTOR)
 /// Generic byte swap.
 HANDLE_TARGET_OPCODE(G_BSWAP)
 
+/// Generic AddressSpaceCast.
+HANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST)
+
 // TODO: Add more generic opcodes as we move along.
 
 /// Marker for the end of the generic opcode.

Modified: llvm/trunk/include/llvm/Target/GenericOpcodes.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/GenericOpcodes.td?rev=335388&r1=335387&r2=335388&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/GenericOpcodes.td (original)
+++ llvm/trunk/include/llvm/Target/GenericOpcodes.td Fri Jun 22 13:58:51 2018
@@ -126,6 +126,11 @@ def G_BSWAP : GenericInstruction {
   let hasSideEffects = 0;
 }
 
+def G_ADDRSPACE_CAST : GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type1:$src);
+  let hasSideEffects = 0;
+}
 //------------------------------------------------------------------------------
 // Binary ops.
 //------------------------------------------------------------------------------

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll?rev=335388&r1=335387&r2=335388&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll Fri Jun 22 13:58:51 2018
@@ -440,6 +440,18 @@ define i64 @bitcast(i64 %a) {
   ret i64 %res2
 }
 
+; CHECK-LABEL: name: addrspacecast
+; CHECK: [[ARG1:%[0-9]+]]:_(p1) = COPY $x0
+; CHECK: [[RES1:%[0-9]+]]:_(p2) = G_ADDRSPACE_CAST [[ARG1]]
+; CHECK: [[RES2:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[RES1]]
+; CHECK: $x0 = COPY [[RES2]]
+; CHECK: RET_ReallyLR implicit $x0
+define i64* @addrspacecast(i32 addrspace(1)* %a) {
+  %res1 = addrspacecast i32 addrspace(1)* %a to i64 addrspace(2)*
+  %res2 = addrspacecast i64 addrspace(2)* %res1 to i64*
+  ret i64* %res2
+}
+
 ; CHECK-LABEL: name: trunc
 ; CHECK: [[ARG1:%[0-9]+]]:_(s64) = COPY $x0
 ; CHECK: [[VEC:%[0-9]+]]:_(<4 x s32>) = G_LOAD