[llvm] r335319 - AMDGPU/GlobalISel: Default to using TableGen'd instruction selector
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 21 20:04:36 PDT 2018
Author: tstellar
Date: Thu Jun 21 20:04:35 2018
New Revision: 335319
URL: http://llvm.org/viewvc/llvm-project?rev=335319&view=rev
Log:
AMDGPU/GlobalISel: Default to using TableGen'd instruction selector
Summary:
We can select all instructions that are marked as legal in a full piglit run,
so now is a good time to make the TableGen'd instruction selector default
for all opcodes. This is NFC for a full piglit run, which is why there are
no tests.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48198
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp?rev=335319&r1=335318&r2=335319&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp Thu Jun 21 20:04:35 2018
@@ -536,13 +536,6 @@ bool AMDGPUInstructionSelector::select(M
switch (I.getOpcode()) {
default:
- break;
- case TargetOpcode::G_ASHR:
- case TargetOpcode::G_SITOFP:
- case TargetOpcode::G_FMUL:
- case TargetOpcode::G_FADD:
- case TargetOpcode::G_FPTOUI:
- case TargetOpcode::G_OR:
return selectImpl(I, CoverageInfo);
case TargetOpcode::G_ADD:
return selectG_ADD(I);
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