[PATCH] D48469: [GISel]: Add opcode to translate addrspacecast
Aditya Nandakumar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 21 18:49:32 PDT 2018
aditya_nandakumar created this revision.
aditya_nandakumar added reviewers: dsanders, aemerson, ab, qcolombet, rtereshin, volkan, bogner.
Herald added a reviewer: javed.absar.
Added Opcode G_ADDR_SPACE_CAST for translation.
Repository:
rL LLVM
https://reviews.llvm.org/D48469
Files:
include/llvm/CodeGen/GlobalISel/IRTranslator.h
include/llvm/Support/TargetOpcodes.def
include/llvm/Target/GenericOpcodes.td
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -440,6 +440,18 @@
ret i64 %res2
}
+; CHECK-LABEL: name: addrspacecast
+; CHECK: [[ARG1:%[0-9]+]]:_(p1) = COPY $x0
+; CHECK: [[RES1:%[0-9]+]]:_(p2) = G_ADDR_SPACE_CAST [[ARG1]]
+; CHECK: [[RES2:%[0-9]+]]:_(p0) = G_ADDR_SPACE_CAST [[RES1]]
+; CHECK: $x0 = COPY [[RES2]]
+; CHECK: RET_ReallyLR implicit $x0
+define i64* @addrspacecast(i32 addrspace(1)* %a) {
+ %res1 = addrspacecast i32 addrspace(1)* %a to i64 addrspace(2)*
+ %res2 = addrspacecast i64 addrspace(2)* %res1 to i64*
+ ret i64* %res2
+}
+
; CHECK-LABEL: name: trunc
; CHECK: [[ARG1:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: [[VEC:%[0-9]+]]:_(<4 x s32>) = G_LOAD
Index: include/llvm/Target/GenericOpcodes.td
===================================================================
--- include/llvm/Target/GenericOpcodes.td
+++ include/llvm/Target/GenericOpcodes.td
@@ -126,6 +126,11 @@
let hasSideEffects = 0;
}
+def G_ADDR_SPACE_CAST : GenericInstruction {
+ let OutOperandList = (outs type0:$dst);
+ let InOperandList = (ins type1:$src);
+ let hasSideEffects = 0;
+}
//------------------------------------------------------------------------------
// Binary ops.
//------------------------------------------------------------------------------
Index: include/llvm/Support/TargetOpcodes.def
===================================================================
--- include/llvm/Support/TargetOpcodes.def
+++ include/llvm/Support/TargetOpcodes.def
@@ -467,6 +467,9 @@
/// Generic byte swap.
HANDLE_TARGET_OPCODE(G_BSWAP)
+/// Generic AddressSpaceCast.
+HANDLE_TARGET_OPCODE(G_ADDR_SPACE_CAST)
+
// TODO: Add more generic opcodes as we move along.
/// Marker for the end of the generic opcode.
Index: include/llvm/CodeGen/GlobalISel/IRTranslator.h
===================================================================
--- include/llvm/CodeGen/GlobalISel/IRTranslator.h
+++ include/llvm/CodeGen/GlobalISel/IRTranslator.h
@@ -423,7 +423,7 @@
return false;
}
bool translateAddrSpaceCast(const User &U, MachineIRBuilder &MIRBuilder) {
- return false;
+ return translateCast(TargetOpcode::G_ADDR_SPACE_CAST, U, MIRBuilder);
}
bool translateCleanupPad(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
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