[PATCH] D48437: [ARM] Cortex-M0 strict align target feature

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: samparker, olista01, rengolin.
Herald added a reviewer: javed.absar.
Herald added subscribers: chrib, kristof.beyls.

This sets target feature FeatureStrictAlign for both the Cortex-M0
and Cortex-M0+, because there is no support for unaligned accesses
on these Cortex-M0 processors.
It looks like we always pass target feature "+strict-align" from
clang, so this is not a user facing problem, but setting this
target feature looks more correct to me (unless I of course miss
something here).


https://reviews.llvm.org/D48437

Files:
  lib/Target/ARM/ARM.td


Index: lib/Target/ARM/ARM.td
===================================================================
--- lib/Target/ARM/ARM.td
+++ lib/Target/ARM/ARM.td
@@ -713,8 +713,10 @@
                                                          FeatureVFP2,
                                                          FeatureHasSlowFPVMLx]>;
 
-def : Processor<"cortex-m0",        ARMV6Itineraries,   [ARMv6m]>;
-def : Processor<"cortex-m0plus",    ARMV6Itineraries,   [ARMv6m]>;
+def : Processor<"cortex-m0",        ARMV6Itineraries,   [ARMv6m,
+                                                         FeatureStrictAlign]>;
+def : Processor<"cortex-m0plus",    ARMV6Itineraries,   [ARMv6m,
+                                                         FeatureStrictAlign]>;
 def : Processor<"cortex-m1",        ARMV6Itineraries,   [ARMv6m]>;
 def : Processor<"sc000",            ARMV6Itineraries,   [ARMv6m]>;
 


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