[PATCH] D48420: [CodeGen} Avoid handling DBG_VALUE in LiveRegUnits::stepBackward

[Jesper Antonsson via Phabricator via llvm-commits]

JesperAntonsson created this revision.
JesperAntonsson added reviewers: kparzysz, MatzeB, mattd, bjope.
JesperAntonsson added a project: debug-info.

This patch prevents DBG_VALUE instructions from influencing LiveRegUnits::stepBackward(). It mirrors  https://reviews.llvm.org/rL327862 / https://reviews.llvm.org/D43850 that made the same changes for LivePhysRegs.

What motivated this patch was a problem in an out-of-tree target where the PrologEpilogInserter does register scavenging and decides it has to spill the scavenged register that LiveRegUnits finds live as it has a DBG_VALUE use. Since it's out-of-tree and a bit involved, I don't have a testcase to present here.


https://reviews.llvm.org/D48420

Files:
  lib/CodeGen/LiveRegUnits.cpp


Index: lib/CodeGen/LiveRegUnits.cpp
===================================================================
--- lib/CodeGen/LiveRegUnits.cpp
+++ lib/CodeGen/LiveRegUnits.cpp
@@ -46,7 +46,7 @@
   // Remove defined registers and regmask kills from the set.
   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
     if (O->isReg()) {
-      if (!O->isDef())
+      if (!O->isDef() || O->isDebug())
         continue;
       unsigned Reg = O->getReg();
       if (!TargetRegisterInfo::isPhysicalRegister(Reg))
@@ -58,7 +58,7 @@
 
   // Add uses to the set.
   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
-    if (!O->isReg() || !O->readsReg())
+    if (!O->isReg() || !O->readsReg() || O->isDebug())
       continue;
     unsigned Reg = O->getReg();
     if (!TargetRegisterInfo::isPhysicalRegister(Reg))


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D48420.152248.patch
Type: text/x-patch
Size: 811 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180621/6fd66086/attachment-0001.bin>