[PATCH] D43608: [X86] Use setcc ISD opcode for AVX512 integer comparisons all the way to isel

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 20 13:36:26 PDT 2018


craig.topper added inline comments.


================
Comment at: test/CodeGen/X86/broadcastm-lowering.ll:143
 ; AVX512CD-NEXT:    kmovw %k0, %eax
-; AVX512CD-NEXT:    vpxor %xmm0, %xmm0, %xmm0
-; AVX512CD-NEXT:    vpinsrb $0, %eax, %xmm0, %xmm0
-; AVX512CD-NEXT:    vpinsrb $8, %eax, %xmm0, %xmm0
-; AVX512CD-NEXT:    vinserti128 $1, %xmm0, %ymm0, %ymm0
+; AVX512CD-NEXT:    movzbl %al, %eax
+; AVX512CD-NEXT:    vmovq %rax, %xmm0
----------------
RKSimon wrote:
> craig.topper wrote:
> > I'm not sure why this changed. I think its because vector lowering didn't change anything. It used to change setcc to pcmpm. But it doesn't now, so the post vector lowering DAG combine doesn't run. And there's a target independent DAG combine, reduceBuildVecExtToExtBuildVec, that is only allowed to run after legalize vector ops. And if the post vector ops dag combine doesn't run, then the build vector is lowered before the last DAG combine runs so reduceBuildVecExtToExtBuildVec doesn't get called.
> Isn't this actually better?
Yes it is better. I was just explaining that it was an accident and would probably easily break on a larger test case.


https://reviews.llvm.org/D43608





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