[llvm] r335097 - [X86] Add sched class WriteLAHFSAHF and fix values.
Clement Courbet via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 19 23:13:39 PDT 2018
Author: courbet
Date: Tue Jun 19 23:13:39 2018
New Revision: 335097
URL: http://llvm.org/viewvc/llvm-project?rev=335097&view=rev
Log:
[X86] Add sched class WriteLAHFSAHF and fix values.
Summary:
I ran llvm-exegesis on SKX, SKL, BDW, HSW, SNB.
Atom is from Agner and SLM is a guess.
I've left AMD processors alone.
Reviewers: RKSimon, craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48079
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
llvm/trunk/lib/Target/X86/X86SchedHaswell.td
llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td
llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
llvm/trunk/lib/Target/X86/X86Schedule.td
llvm/trunk/lib/Target/X86/X86ScheduleAtom.td
llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
llvm/trunk/lib/Target/X86/X86ScheduleSLM.td
llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll
llvm/trunk/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/Generic/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/Haswell/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/SandyBridge/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/SkylakeClient/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/SkylakeServer/resources-x86_64.s
llvm/trunk/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Jun 19 23:13:39 2018
@@ -199,9 +199,9 @@ def X86call : SDNode<"X86ISD::CALL",
SDNPVariadic]>;
def X86NoTrackCall : SDNode<"X86ISD::NT_CALL", SDT_X86Call,
- [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
+ [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
SDNPVariadic]>;
-def X86NoTrackBrind : SDNode<"X86ISD::NT_BRIND", SDT_X86NtBrind,
+def X86NoTrackBrind : SDNode<"X86ISD::NT_BRIND", SDT_X86NtBrind,
[SDNPHasChain]>;
def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr,
@@ -1189,7 +1189,7 @@ let Defs = [ESP], Uses = [ESP], hasSideE
let mayLoad = 1, SchedRW = [WriteLoad] in {
def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
OpSize16;
-def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>,
+def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>,
OpSize32, Requires<[Not64BitMode]>;
// Long form for the disassembler.
let isCodeGenOnly = 1, ForceDisassemble = 1 in {
@@ -1724,7 +1724,7 @@ def MOV8rm_NOREX : I<0x8A, MRMSrcMem,
// Condition code ops, incl. set if equal/not equal/...
-let SchedRW = [WriteALU] in {
+let SchedRW = [WriteLAHFSAHF] in {
let Defs = [EFLAGS], Uses = [AH] in
def SAHF : I<0x9E, RawFrm, (outs), (ins), "sahf",
[(set EFLAGS, (X86sahf AH))]>,
Modified: llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedBroadwell.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedBroadwell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedBroadwell.td Tue Jun 19 23:13:39 2018
@@ -134,6 +134,7 @@ def : WriteRes<WriteSETCCStore, [BWPort
let Latency = 2;
let NumMicroOps = 3;
}
+def : WriteRes<WriteLAHFSAHF, [BWPort06]>;
// Bit counts.
defm : BWWriteResPair<WriteBitScan, [BWPort1], 3>;
@@ -624,7 +625,6 @@ def BWWriteResGroup9 : SchedWriteRes<[BW
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[BWWriteResGroup9], (instrs LAHF, SAHF)>; // TODO: This doesnt match Agner's data
def: InstRW<[BWWriteResGroup9], (instregex "SGDT64m",
"SIDT64m",
"SMSW16m",
Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Tue Jun 19 23:13:39 2018
@@ -135,6 +135,7 @@ def : WriteRes<WriteSETCCStore, [HWPort
let Latency = 2;
let NumMicroOps = 3;
}
+def : WriteRes<WriteLAHFSAHF, [HWPort06]>;
// This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on
@@ -912,7 +913,6 @@ def HWWriteResGroup10 : SchedWriteRes<[H
}
def: InstRW<[HWWriteResGroup10], (instrs CBW, CWDE, CDQE,
CMC, STC)>;
-def: InstRW<[HWWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
def: InstRW<[HWWriteResGroup10], (instregex "SGDT64m",
"SIDT64m",
"SMSW16m",
Modified: llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSandyBridge.td Tue Jun 19 23:13:39 2018
@@ -134,6 +134,7 @@ def : WriteRes<WriteSETCCStore, [SBPort
let Latency = 2;
let NumMicroOps = 3;
}
+def : WriteRes<WriteLAHFSAHF, [SBPort05]>;
// This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on
@@ -558,7 +559,6 @@ def SBWriteResGroup4 : SchedWriteRes<[SB
let ResourceCycles = [1];
}
def: InstRW<[SBWriteResGroup4], (instrs CDQ, CQO)>;
-def: InstRW<[SBWriteResGroup4], (instrs LAHF, SAHF)>;
def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)ri8",
"BT(16|32|64)rr",
"BTC(16|32|64)ri8",
Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td Tue Jun 19 23:13:39 2018
@@ -132,6 +132,7 @@ def : WriteRes<WriteSETCCStore, [SKLPor
let Latency = 2;
let NumMicroOps = 3;
}
+def : WriteRes<WriteLAHFSAHF, [SKLPort06]>;
// Bit counts.
defm : SKLWriteResPair<WriteBitScan, [SKLPort1], 3>;
@@ -629,7 +630,6 @@ def SKLWriteResGroup10 : SchedWriteRes<[
}
def: InstRW<[SKLWriteResGroup10], (instrs CBW, CWDE, CDQE,
CMC, STC)>;
-def: InstRW<[SKLWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
def: InstRW<[SKLWriteResGroup10], (instregex "SGDT64m",
"SIDT64m",
"SMSW16m",
Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td Tue Jun 19 23:13:39 2018
@@ -132,6 +132,7 @@ def : WriteRes<WriteSETCCStore, [SKXPor
let Latency = 2;
let NumMicroOps = 3;
}
+def : WriteRes<WriteLAHFSAHF, [SKXPort06]>;
// Integer shifts and rotates.
defm : SKXWriteResPair<WriteShift, [SKXPort06], 1>;
@@ -652,7 +653,6 @@ def SKXWriteResGroup10 : SchedWriteRes<[
}
def: InstRW<[SKXWriteResGroup10], (instrs CBW, CWDE, CDQE,
CMC, STC)>;
-def: InstRW<[SKXWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
def: InstRW<[SKXWriteResGroup10], (instregex "SGDT64m",
"SIDT64m",
"SMSW16m",
Modified: llvm/trunk/lib/Target/X86/X86Schedule.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Schedule.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Schedule.td (original)
+++ llvm/trunk/lib/Target/X86/X86Schedule.td Tue Jun 19 23:13:39 2018
@@ -137,6 +137,7 @@ defm WriteCMOV2 : X86SchedWritePair; //
def WriteFCMOV : SchedWrite; // X87 conditional move.
def WriteSETCC : SchedWrite; // Set register based on condition code.
def WriteSETCCStore : SchedWrite;
+def WriteLAHFSAHF : SchedWrite; // Load/Store flags in AH.
// Integer shifts and rotates.
defm WriteShift : X86SchedWritePair;
Modified: llvm/trunk/lib/Target/X86/X86ScheduleAtom.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleAtom.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleAtom.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleAtom.td Tue Jun 19 23:13:39 2018
@@ -101,6 +101,10 @@ def : WriteRes<WriteSETCCStore, [AtomPo
let Latency = 2;
let ResourceCycles = [2];
}
+def : WriteRes<WriteLAHFSAHF, [AtomPort01]> {
+ let Latency = 2;
+ let ResourceCycles = [2];
+}
defm : X86WriteResUnsupported<WriteIMulH>;
Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Tue Jun 19 23:13:39 2018
@@ -177,6 +177,7 @@ defm : JWriteResIntPair<WriteCMOV2, [JAL
defm : X86WriteRes<WriteFCMOV, [JFPU0, JFPA], 3, [1,1], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [JALU01]>; // Setcc.
def : WriteRes<WriteSETCCStore, [JALU01,JSAGU]>;
+def : WriteRes<WriteLAHFSAHF, [JALU01]>;
// This is for simple LEAs with one or two input operands.
// FIXME: SAGU 3-operand LEA
Modified: llvm/trunk/lib/Target/X86/X86ScheduleSLM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleSLM.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleSLM.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleSLM.td Tue Jun 19 23:13:39 2018
@@ -109,6 +109,7 @@ def : WriteRes<WriteSETCCStore, [SLM_IE
// FIXME Latency and NumMicrOps?
let ResourceCycles = [2,1];
}
+def : WriteRes<WriteLAHFSAHF, [SLM_IEC_RSV01]>;
// This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on
Modified: llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td Tue Jun 19 23:13:39 2018
@@ -162,6 +162,7 @@ defm : ZnWriteResPair<WriteCMOV, [ZnAL
defm : ZnWriteResPair<WriteCMOV2, [ZnALU], 1>;
def : WriteRes<WriteSETCC, [ZnALU]>;
def : WriteRes<WriteSETCCStore, [ZnALU, ZnAGU]>;
+defm : X86WriteRes<WriteLAHFSAHF, [ZnALU], 2, [1], 2>;
// Bit counts.
defm : ZnWriteResPair<WriteBitScan, [ZnALU], 3>;
@@ -509,13 +510,6 @@ def : InstRW<[ZnWritePushA], (instregex
//LAHF
def : InstRW<[WriteMicrocoded], (instrs LAHF)>;
-// SAHF.
-def ZnWriteSAHF : SchedWriteRes<[ZnALU]> {
- let Latency = 2;
- let NumMicroOps = 2;
-}
-def : InstRW<[ZnWriteSAHF], (instrs SAHF)>;
-
// BSWAP.
def ZnWriteBSwap : SchedWriteRes<[ZnALU]> {
let ResourceCycles = [4];
Modified: llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll Tue Jun 19 23:13:39 2018
@@ -7301,8 +7301,8 @@ define void @test_lahf_sahf() optsize {
; ATOM-LABEL: test_lahf_sahf:
; ATOM: # %bb.0:
; ATOM-NEXT: #APP
-; ATOM-NEXT: lahf # sched: [1:0.50]
-; ATOM-NEXT: sahf # sched: [1:0.50]
+; ATOM-NEXT: lahf # sched: [2:1.00]
+; ATOM-NEXT: sahf # sched: [2:1.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retq # sched: [79:39.50]
;
@@ -7325,32 +7325,32 @@ define void @test_lahf_sahf() optsize {
; HASWELL-LABEL: test_lahf_sahf:
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: lahf # sched: [1:0.25]
-; HASWELL-NEXT: sahf # sched: [1:0.25]
+; HASWELL-NEXT: lahf # sched: [1:0.50]
+; HASWELL-NEXT: sahf # sched: [1:0.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retq # sched: [7:1.00]
;
; BROADWELL-LABEL: test_lahf_sahf:
; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: lahf # sched: [1:0.25]
-; BROADWELL-NEXT: sahf # sched: [1:0.25]
+; BROADWELL-NEXT: lahf # sched: [1:0.50]
+; BROADWELL-NEXT: sahf # sched: [1:0.50]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_lahf_sahf:
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: lahf # sched: [1:0.25]
-; SKYLAKE-NEXT: sahf # sched: [1:0.25]
+; SKYLAKE-NEXT: lahf # sched: [1:0.50]
+; SKYLAKE-NEXT: sahf # sched: [1:0.50]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_lahf_sahf:
; SKX: # %bb.0:
; SKX-NEXT: #APP
-; SKX-NEXT: lahf # sched: [1:0.25]
-; SKX-NEXT: sahf # sched: [1:0.25]
+; SKX-NEXT: lahf # sched: [1:0.50]
+; SKX-NEXT: sahf # sched: [1:0.50]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retq # sched: [7:1.00]
;
Modified: llvm/trunk/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/Atom/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/Atom/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/Atom/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.50 incq %rdi
# CHECK-NEXT: 1 1 1.00 * * incq (%rax)
+# CHECK-NEXT: 1 2 1.00 lahf
# CHECK-NEXT: 1 7 3.50 mulb %dil
# CHECK-NEXT: 1 7 3.50 * mulb (%rax)
# CHECK-NEXT: 1 7 3.50 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 rorq %cl, %rdi
# CHECK-NEXT: 1 1 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 1 1 1.00 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 2 1.00 sahf
# CHECK-NEXT: 1 1 1.00 sarb %dil
# CHECK-NEXT: 1 1 1.00 shlb %dil
# CHECK-NEXT: 1 1 1.00 shrb %dil
@@ -1156,7 +1162,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1]
-# CHECK-NEXT: 1258.50 963.50
+# CHECK-NEXT: 1260.50 965.50
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] Instructions:
@@ -1357,6 +1363,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1.00 - incl (%rax)
# CHECK-NEXT: 0.50 0.50 incq %rdi
# CHECK-NEXT: 1.00 - incq (%rax)
+# CHECK-NEXT: 1.00 1.00 lahf
# CHECK-NEXT: 3.50 3.50 mulb %dil
# CHECK-NEXT: 3.50 3.50 mulb (%rax)
# CHECK-NEXT: 3.50 3.50 mulw %si
@@ -1514,6 +1521,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1.00 - rorq %cl, %rdi
# CHECK-NEXT: 1.00 - rolq %cl, (%rax)
# CHECK-NEXT: 1.00 - rorq %cl, (%rax)
+# CHECK-NEXT: 1.00 1.00 sahf
# CHECK-NEXT: 1.00 - sarb %dil
# CHECK-NEXT: 1.00 - shlb %dil
# CHECK-NEXT: 1.00 - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax)
+# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 3 1.00 rorq %cl, %rdi
# CHECK-NEXT: 6 8 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 8 1.00 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil
@@ -1164,7 +1170,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
-# CHECK-NEXT: 50.00 - 362.00 242.50 202.00 202.00 167.00 148.00 327.50 69.00
+# CHECK-NEXT: 50.00 - 363.00 242.50 202.00 202.00 167.00 148.00 328.50 69.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
@@ -1365,6 +1371,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
@@ -1522,6 +1529,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 - 0.25 1.25 0.33 rorq %cl, (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 2 5 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.50 incq %rdi
# CHECK-NEXT: 2 5 1.00 * * incq (%rax)
+# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 2 3 1.00 mulb %dil
# CHECK-NEXT: 2 6 1.00 * mulb (%rax)
# CHECK-NEXT: 2 3 1.00 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 0.50 rorq %cl, %rdi
# CHECK-NEXT: 2 4 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 2 4 1.00 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil
@@ -1168,7 +1174,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
-# CHECK-NEXT: 437.00 487.00 380.00 - - - - 263.00 64.00 195.00 - - - -
+# CHECK-NEXT: 438.00 488.00 380.00 - - - - 263.00 64.00 195.00 - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions:
@@ -1369,6 +1375,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incl (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incq %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incq (%rax)
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - lahf
# CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mulb %dil
# CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mulb (%rax)
# CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mulw %si
@@ -1526,6 +1533,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rorq %cl, %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rolq %cl, (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rorq %cl, (%rax)
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - sahf
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - sarb %dil
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shlb %dil
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/Generic/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/Generic/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/Generic/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/Generic/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/Haswell/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/Haswell/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/Haswell/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/Haswell/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax)
+# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 3 1.00 rorq %cl, %rdi
# CHECK-NEXT: 6 9 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 9 1.00 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil
@@ -1164,7 +1170,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
-# CHECK-NEXT: 80.00 - 413.00 263.50 193.00 193.00 158.00 171.00 407.50 66.00
+# CHECK-NEXT: 80.00 - 414.00 263.50 193.00 193.00 158.00 171.00 408.50 66.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
@@ -1365,6 +1371,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
@@ -1522,6 +1529,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 - 0.25 1.25 0.33 rorq %cl, (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/SLM/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/SLM/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/SLM/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 2 5 2.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.50 incq %rdi
# CHECK-NEXT: 2 5 2.00 * * incq (%rax)
+# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 1 6 1.00 * mulb (%rax)
# CHECK-NEXT: 1 3 1.00 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 rorq %cl, %rdi
# CHECK-NEXT: 2 4 2.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 2 4 2.00 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 1.00 sarb %dil
# CHECK-NEXT: 1 1 1.00 shlb %dil
# CHECK-NEXT: 1 1 1.00 shrb %dil
@@ -1162,7 +1168,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
-# CHECK-NEXT: 400.00 - - - - 392.00 234.00 470.00
+# CHECK-NEXT: 400.00 - - - - 393.00 235.00 470.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
@@ -1363,6 +1369,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 incl (%rax)
# CHECK-NEXT: - - - - - 0.50 0.50 - incq %rdi
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 incq (%rax)
+# CHECK-NEXT: - - - - - 0.50 0.50 - lahf
# CHECK-NEXT: - - - - - - 1.00 - mulb %dil
# CHECK-NEXT: - - - - - - 1.00 1.00 mulb (%rax)
# CHECK-NEXT: - - - - - - 1.00 - mulw %si
@@ -1520,6 +1527,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - - - - 1.00 - - rorq %cl, %rdi
# CHECK-NEXT: - - - - - 1.00 - 2.00 rolq %cl, (%rax)
# CHECK-NEXT: - - - - - 1.00 - 2.00 rorq %cl, (%rax)
+# CHECK-NEXT: - - - - - 0.50 0.50 - sahf
# CHECK-NEXT: - - - - - 1.00 - - sarb %dil
# CHECK-NEXT: - - - - - 1.00 - - shlb %dil
# CHECK-NEXT: - - - - - 1.00 - - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/SandyBridge/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/SandyBridge/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/SandyBridge/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/SandyBridge/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.33 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax)
+# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.33 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi
# CHECK-NEXT: 6 9 1.50 * * rolq %cl, (%rax)
# CHECK-NEXT: 6 9 1.50 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil
@@ -1162,7 +1168,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
-# CHECK-NEXT: 160.00 - 346.33 141.33 210.00 338.33 238.00 238.00
+# CHECK-NEXT: 160.00 - 347.33 141.33 210.00 339.33 238.00 238.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
@@ -1363,6 +1369,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incl (%rax)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incq %rdi
# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incq (%rax)
+# CHECK-NEXT: - - 0.50 - - 0.50 - - lahf
# CHECK-NEXT: - - - 1.00 - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulb (%rax)
# CHECK-NEXT: - - 1.17 1.67 - 1.17 - - mulw %si
@@ -1520,6 +1527,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 1.50 - - 1.50 - - rorq %cl, %rdi
# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rorq %cl, (%rax)
+# CHECK-NEXT: - - 0.50 - - 0.50 - - sahf
# CHECK-NEXT: - - 0.50 - - 0.50 - - sarb %dil
# CHECK-NEXT: - - 0.50 - - 0.50 - - shlb %dil
# CHECK-NEXT: - - 0.50 - - 0.50 - - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/SkylakeClient/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/SkylakeClient/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/SkylakeClient/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/SkylakeClient/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax)
+# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi
# CHECK-NEXT: 6 8 1.50 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 8 1.50 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil
@@ -1164,7 +1170,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
-# CHECK-NEXT: 60.00 - 429.50 223.50 202.00 202.00 167.00 184.00 414.00 69.00
+# CHECK-NEXT: 60.00 - 430.50 223.50 202.00 202.00 167.00 184.00 415.00 69.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
@@ -1365,6 +1371,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
@@ -1522,6 +1529,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 1.50 - - - - - 1.50 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.50 - 0.83 0.83 1.00 - 1.50 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.50 - 0.83 0.83 - - 1.50 0.33 rorq %cl, (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/SkylakeServer/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/SkylakeServer/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/SkylakeServer/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/SkylakeServer/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax)
+# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi
# CHECK-NEXT: 6 8 1.50 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 8 1.50 * * rorq %cl, (%rax)
+# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil
@@ -1164,7 +1170,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
-# CHECK-NEXT: 60.00 - 429.75 223.75 202.00 202.00 167.00 184.25 414.25 69.00
+# CHECK-NEXT: 60.00 - 430.75 223.75 202.00 202.00 167.00 184.25 415.25 69.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
@@ -1365,6 +1371,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
@@ -1522,6 +1529,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 1.50 - - - - - 1.50 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.50 - 0.83 0.83 1.00 - 1.50 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.50 - 0.83 0.83 - - 1.50 0.33 rorq %cl, (%rax)
+# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
Modified: llvm/trunk/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s?rev=335097&r1=335096&r2=335097&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s Tue Jun 19 23:13:39 2018
@@ -222,6 +222,8 @@ incl (%rax)
incq %rdi
incq (%rax)
+lahf
+
mulb %dil
mulb (%rax)
mulw %si
@@ -395,6 +397,8 @@ rorq %cl, %rdi
rolq %cl, (%rax)
rorq %cl, (%rax)
+sahf
+
sarb %dil
shlb %dil
shrb %dil
@@ -806,6 +810,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 2 5 0.50 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 2 5 0.50 * * incq (%rax)
+# CHECK-NEXT: 1 100 0.25 lahf
# CHECK-NEXT: 1 4 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 1 3 1.00 mulw %si
@@ -963,6 +968,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 0.25 rorq %cl, %rdi
# CHECK-NEXT: 3 5 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 3 5 1.00 * * rorq %cl, (%rax)
+# CHECK-NEXT: 2 2 0.25 sahf
# CHECK-NEXT: 1 1 0.25 sarb %dil
# CHECK-NEXT: 1 1 0.25 shlb %dil
# CHECK-NEXT: 1 1 0.25 shrb %dil
@@ -1166,7 +1172,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
-# CHECK-NEXT: 131.50 131.50 111.75 145.75 127.75 111.75 392.00 - - - - 34.00
+# CHECK-NEXT: 131.50 131.50 112.00 146.00 128.00 112.00 392.00 - - - - 34.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:
@@ -1367,6 +1373,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incq %rdi
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incq (%rax)
+# CHECK-NEXT: - - - - - - - - - - - - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulb %dil
# CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulb (%rax)
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulw %si
@@ -1524,6 +1531,7 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, %rdi
# CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rolq %cl, (%rax)
# CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, (%rax)
+# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sahf
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sarb %dil
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shlb %dil
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shrb %dil
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