[llvm] r335066 - [MIRParser] Update a diagnostic message to use the correct register sigil. NFC

[Matt Davis via llvm-commits]

Author: mattd
Date: Tue Jun 19 11:39:40 2018
New Revision: 335066

URL: http://llvm.org/viewvc/llvm-project?rev=335066&view=rev
Log:
[MIRParser] Update a diagnostic message to use the correct register sigil. NFC

Summary:
Patch r323922 changed the sigil for physical registers to '$',  instead of '%'.
An error message was missed during this change, and reports the wrong sigil.
This patch corrects that diagnostic and the tests that check that error string.


Reviewers: zer0, bjope

Reviewed By: bjope

Subscribers: bjope, thegameg, plotfi, llvm-commits

Differential Revision: https://reviews.llvm.org/D48086

Modified:
    llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
    llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
    llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
    llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir

Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=335066&r1=335065&r2=335066&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Tue Jun 19 11:39:40 2018
@@ -929,7 +929,7 @@ bool MIParser::verifyImplicitOperands(Ar
       continue;
     return error(Operands.empty() ? Token.location() : Operands.back().End,
                  Twine("missing implicit register operand '") +
-                     printImplicitRegisterFlag(I) + " %" +
+                     printImplicitRegisterFlag(I) + " $" +
                      getRegisterName(TRI, I.getReg()) + "'");
   }
   return false;

Modified: llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir?rev=335066&r1=335065&r2=335066&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir Tue Jun 19 11:39:40 2018
@@ -23,7 +23,7 @@ body: |
   bb.0.entry:
     $eax = MOV32rm $rdi, 1, _, 0, _
     CMP32ri8 $eax, 10, implicit-def $eflags
-  ; CHECK: [[@LINE+1]]:35: missing implicit register operand 'implicit %eflags'
+  ; CHECK: [[@LINE+1]]:35: missing implicit register operand 'implicit $eflags'
     JG_1 %bb.2.exit, implicit $eax
 
   bb.1.less:

Modified: llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir?rev=335066&r1=335065&r2=335066&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir Tue Jun 19 11:39:40 2018
@@ -23,7 +23,7 @@ body: |
   bb.0.entry:
     $eax = MOV32rm $rdi, 1, _, 0, _
     CMP32ri8 $eax, 10, implicit-def $eflags
-  ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit %eflags'
+  ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit $eflags'
     JG_1 %bb.2.exit, implicit-def $eflags
 
   bb.1.less:

Modified: llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir?rev=335066&r1=335065&r2=335066&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir Tue Jun 19 11:39:40 2018
@@ -27,7 +27,7 @@ body: |
 
     $eax = MOV32rm $rdi, 1, _, 0, _
     CMP32ri8 $eax, 10, implicit-def $eflags
-  ; CHECK: [[@LINE+1]]:20: missing implicit register operand 'implicit %eflags'
+  ; CHECK: [[@LINE+1]]:20: missing implicit register operand 'implicit $eflags'
     JG_1 %bb.2.exit
 
   bb.1.less: