[llvm] r335061 - [Hexagon] Enforce restrictions on packetizing cache instructions
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 19 10:26:20 PDT 2018
Author: kparzysz
Date: Tue Jun 19 10:26:20 2018
New Revision: 335061
URL: http://llvm.org/viewvc/llvm-project?rev=335061&view=rev
Log:
[Hexagon] Enforce restrictions on packetizing cache instructions
Added:
llvm/trunk/test/CodeGen/Hexagon/packetize-dccleana.mir
Modified:
llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
Modified: llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp?rev=335061&r1=335060&r2=335061&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp Tue Jun 19 10:26:20 2018
@@ -1115,6 +1115,10 @@ static bool cannotCoexistAsymm(const Mac
case Hexagon::S4_stored_locked:
case Hexagon::L2_loadw_locked:
case Hexagon::L4_loadd_locked:
+ case Hexagon::Y2_dccleana:
+ case Hexagon::Y2_dccleaninva:
+ case Hexagon::Y2_dcinva:
+ case Hexagon::Y2_dczeroa:
case Hexagon::Y4_l2fetch:
case Hexagon::Y5_l2fetch: {
// These instructions can only be grouped with ALU32 or non-floating-point
Added: llvm/trunk/test/CodeGen/Hexagon/packetize-dccleana.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/packetize-dccleana.mir?rev=335061&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/packetize-dccleana.mir (added)
+++ llvm/trunk/test/CodeGen/Hexagon/packetize-dccleana.mir Tue Jun 19 10:26:20 2018
@@ -0,0 +1,16 @@
+# RUN: llc -march=hexagon -run-pass=hexagon-packetizer -o - %s | FileCheck %s
+
+# Make sure that the load is not packetized together with the dccleana.
+# CHECK-NOT: BUNDLE
+
+---
+name: foo
+tracksRegLiveness: true
+fixedStack:
+- { id: 0, offset: 0, size: 16, alignment: 8, isImmutable: true }
+body: |
+ bb.0:
+ liveins: $r1
+ Y2_dccleana killed renamable $r1
+ $d8 = L2_loadrd_io killed $r29, 8 :: (load 8 from %fixed-stack.0)
+...
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