[PATCH] D48102: Improve handling of COPY instructions with identical value numbers

Tue Jun 19 09:48:00 PDT 2018

tpr added a comment.

Good spot on the typo, but unfortunately it does not fix my latest problem. I have been told that I am not allowed to send the test case outside of AMD, so I'll have to try and get by with just showing you part of a debug dump of what is going on.

It is trying to coalesce %17 and %25, and the main range and L00000008 say that 832r is a CR_Erase with Identical set. But then L00000001 says that 832r is CR_Unresolved.

Any ideas? I'll have to stop working on this in a minute until tomorrow.

  ********** INTERVALS **********
  %1 [912r,928r:0)  0 at 912r weight:0.000000e+00
  %16 [816r,832r:0)  0 at 816r weight:0.000000e+00
  %17 [800r,848r:0)  0 at 800r weight:0.000000e+00
  %18 [720r,720d:0)  0 at 720r weight:0.000000e+00
  %25 [528r,592r:0)[592r,608r:3)[608r,640r:4)[640r,704B:5)[704B,752r:0)[752r,768r:1)[768r,816r:2)[832r,864B:6)[864B,912r:7)  0 at 528r 1 at 752r 2 at 768r 3 at 592r 4 at 608r 5 at 640r 6 at 832r 7 at 864B-phi L00000008 [640r,672r:0)[832r,832d:1)  0 at 640r 1 at 832r 2 at x L00000001 [592r,672r:1)[752r,800r:0)[832r,832d:2)  0 at 752r 1 at 592r 2 at 832r 3 at x L00000002 [608r,672r:1)[768r,800r:0)[832r,832d:2)  0 at 768r 1 at 608r 2 at 832r 3 at x L00000004 [528r,816r:0)[832r,864B:1)[864B,912r:2)  0 at 528r 1 at 832r 2 at 864B-phi weight:0.000000e+00
  %36 [976r,992r:0)  0 at 976r weight:0.000000e+00
  %41 [672r,704B:1)[848r,864B:0)[864B,976r:2)  0 at 848r 1 at 672r 2 at 864B-phi weight:0.000000e+00
  %42 [112r,144B:2)[992r,1008B:1)[1008B,1040r:3)[1184r,1216B:0)  0 at 1184r 1 at 992r 2 at 112r 3 at 1008B-phi L00000008 [112r,144B:2)[992r,1008B:1)[1008B,1040r:3)[1184r,1216B:0)  0 at 1184r 1 at 992r 2 at 112r 3 at 1008B-phi L00000007 [112r,112d:2)[992r,992d:1)[1184r,1184d:0)  0 at 1184r 1 at 992r 2 at 112r 3 at x weight:0.000000e+00
  RegMasks:
  ********** MACHINEINSTRS **********
  ...
  752B	  %25.sub0:sreg_128 = COPY %25.sub2:sreg_128
  768B	  %25.sub1:sreg_128 = COPY %25.sub2:sreg_128
  800B	  %17:sreg_128 = COPY %25:sreg_128
  816B	  %16:sreg_128 = COPY %25:sreg_128
  832B	  %25:sreg_128 = COPY %16:sreg_128
  848B	  %41:sreg_128 = COPY %17:sreg_128

  864B	bb.17.bb22:
  	; predecessors: %bb.15, %bb.16
  ...

  # End machine code for function _amdgpu_cs_main.

  800B	%17:sreg_128 = COPY %25:sreg_128
  	Considering merging to SReg_128 with %17 in %25
  		RHS = %17 [800r,848r:0)  0 at 800r weight:0.000000e+00
  		LHS = %25 [528r,592r:0)[592r,608r:3)[608r,640r:4)[640r,704B:5)[704B,752r:0)[752r,768r:1)[768r,816r:2)[832r,864B:6)[864B,912r:7)  0 at 528r 1 at 752r 2 at 768r 3 at 592r 4 at 608r 5 at 640r 6 at 832r 7 at 864B-phi L00000008 [640r,672r:0)[832r,832d:1)  0 at 640r 1 at 832r 2 at x L00000001 [592r,672r:1)[752r,800r:0)[832r,832d:2)  0 at 752r 1 at 592r 2 at 832r 3 at x L00000002 [608r,672r:1)[768r,800r:0)[832r,832d:2)  0 at 768r 1 at 608r 2 at 832r 3 at x L00000004 [528r,816r:0)[832r,864B:1)[864B,912r:2)  0 at 528r 1 at 832r 2 at 864B-phi weight:0.000000e+00
  		analyzeValue(528r) gives CR_Keep
  		analyzeValue(752r) gives CR_Keep
  		analyzeValue(768r) gives CR_Keep
  		analyzeValue(592r) gives CR_Keep
  		analyzeValue(608r) gives CR_Keep
  		analyzeValue(640r) gives CR_Keep
  		analyzeValue(800r) gives CR_Erase
  		merge %17:0 at 800r into %25:2 at 768r --> @768r
  		Identical CR_Erase
  		analyzeValue(832r) gives CR_Erase
  		merge %25:6 at 832r into %17:0 at 800r --> @768r
  		analyzeValue(864B) gives CR_Keep
  		LHST = %25 %25 [528r,592r:0)[592r,608r:3)[608r,640r:4)[640r,704B:5)[704B,752r:0)[752r,768r:1)[768r,816r:2)[832r,864B:6)[864B,912r:7)  0 at 528r 1 at 752r 2 at 768r 3 at 592r 4 at 608r 5 at 640r 6 at 832r 7 at 864B-phi L00000008 [640r,672r:0)[832r,832d:1)  0 at 640r 1 at 832r 2 at x L00000001 [592r,672r:1)[752r,800r:0)[832r,832d:2)  0 at 752r 1 at 592r 2 at 832r 3 at x L00000002 [608r,672r:1)[768r,800r:0)[832r,832d:2)  0 at 768r 1 at 608r 2 at 832r 3 at x L00000004 [528r,816r:0)[832r,864B:1)[864B,912r:2)  0 at 528r 1 at 832r 2 at 864B-phi weight:0.000000e+00
  	joinSubRegRanges  L00000008 EMPTY
  		LRange [640r,672r:0)[832r,832d:1)  0 at 640r 1 at 832r 2 at x
  		RRange [800r,848r:0)  0 at 800r
  		analyzeValue(640r) gives CR_Keep
  		analyzeValue(800r) gives CR_Keep
  		Identical CR_Erase
  		analyzeValue(832r) gives CR_Erase
  		merge %25:1 at 832r into %17:0 at 800r --> @800r
  		analyzeValue(invalid) gives CR_Keep
  		joined lanes: [640r,672r:0)[800r,848r:1)  0 at 640r 1 at 800r 2 at x
  	joinSubRegRanges  L00000001 EMPTY
  		LRange [592r,672r:1)[752r,800r:0)[832r,832d:2)  0 at 752r 1 at 592r 2 at 832r 3 at x
  		RRange [800r,848r:0)  0 at 800r
  		analyzeValue(752r) gives CR_Keep
  		analyzeValue(592r) gives CR_Keep
  		analyzeValue(800r) gives CR_Erase
  		merge %17:0 at 800r into %25:0 at 752r --> @752r
  		analyzeValue(832r) gives CR_Unresolved
  		analyzeValue(invalid) gives CR_Keep
  		conflict at %25:2 at 832r
  *** Couldn't join subrange!

  UNREACHABLE executed at ../lib/CodeGen/RegisterCoalescer.cpp:3060!

Repository:
  rL LLVM

https://reviews.llvm.org/D48102