[PATCH] D46582: [PowerPC] Fix label address calculation for ppc32

Strahinja Petrovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 19 06:12:18 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL335043: [PowerPC] Fix label address calculation for ppc32 (authored by spetrovic, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D46582?vs=148808&id=151907#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D46582

Files:
  llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/trunk/test/CodeGen/PowerPC/ppc-label.ll


Index: llvm/trunk/test/CodeGen/PowerPC/ppc-label.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc-label.ll
+++ llvm/trunk/test/CodeGen/PowerPC/ppc-label.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -relocation-model=pic | FileCheck %s
+
+; unsigned int foo(void) {
+;   return 0;
+; }
+;
+; int main() {
+; L: __attribute__ ((unused));
+;   static const unsigned int arr[] =
+;   {
+;     (unsigned int) &&x  - (unsigned int)&&L ,
+;     (unsigned int) &&y  - (unsigned int)&&L
+;   };
+;
+;   unsigned int ret = foo();
+;   void* g = (void *) ((unsigned int)&&L + arr[ret]);
+;   goto *g;
+;
+; x:
+;   return 15;
+; y:
+;   return 25;
+; }
+
+define i32 @foo() local_unnamed_addr {
+entry:
+  ret i32 0
+}
+
+define i32 @main() {
+entry:
+  br label %L
+
+L:                                                ; preds = %L, %entry
+  indirectbr i8* inttoptr (i32 add (i32 ptrtoint (i8* blockaddress(@main, %L) to i32), i32 sub (i32 ptrtoint (i8* blockaddress(@main, %return) to i32), i32 ptrtoint (i8* blockaddress(@main, %L) to i32))) to i8*), [label %return, label %L]
+
+return:                                           ; preds = %L
+  ret i32 15
+}
+
+
+; CHECK:     lwz 3, .LC0-.LTOC(30)
+; CHECK-NOT: li 3, .Ltmp1-.L1$pb at l
+; CHECK-NOT: addis 4, 30, .Ltmp1-.L1$pb at ha
\ No newline at end of file
Index: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2581,10 +2581,11 @@
 
   // 64-bit SVR4 ABI code is always position-independent.
   // The actual BlockAddress is stored in the TOC.
-  if (Subtarget.isSVR4ABI() && Subtarget.isPPC64()) {
-    setUsesTOCBasePtr(DAG);
+  if (Subtarget.isSVR4ABI() && isPositionIndependent()) {
+    if (Subtarget.isPPC64())
+      setUsesTOCBasePtr(DAG);
     SDValue GA = DAG.getTargetBlockAddress(BA, PtrVT, BASDN->getOffset());
-    return getTOCEntry(DAG, SDLoc(BASDN), true, GA);
+    return getTOCEntry(DAG, SDLoc(BASDN), Subtarget.isPPC64(), GA);
   }
 
   unsigned MOHiFlag, MOLoFlag;


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D46582.151907.patch
Type: text/x-patch
Size: 2201 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180619/4206b3e2/attachment.bin>


More information about the llvm-commits mailing list