[PATCH] D47676: [X86][Znver1] Specify Register Files, RCU; FP scheduler capacity.

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 19 03:37:14 PDT 2018

Previous message: [PATCH] D48236: [IR] move shuffle mask queries from TTI to ShuffleVectorInst
Next message: [PATCH] D47676: [X86][Znver1] Specify Register Files, RCU; FP scheduler capacity.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

lebedev.ri added a comment.

@GGanesh any further thoughts?


Repository:
  rL LLVM

https://reviews.llvm.org/D47676

Previous message: [PATCH] D48236: [IR] move shuffle mask queries from TTI to ShuffleVectorInst
Next message: [PATCH] D47676: [X86][Znver1] Specify Register Files, RCU; FP scheduler capacity.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list