[PATCH] D48308: [POWER9] Ensure float128 in non-homogenous aggregates are passed via VSX registers
Lei Huang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 18 20:08:22 PDT 2018
lei created this revision.
lei added reviewers: nemanjai, kbarton, stefanp, hfinkel.
Non-homogenous aggregates are passed in consecutive GPRs, in GPRs and in memory, or in memory. This patch ensures that float128 members of non-homogenous aggregates are passed via VSX registers.
This is done via custom lowering a bitcast of a build_pari(i64,i64) to float128 to a new PPCISD node, `BUILD_FP128`.
https://reviews.llvm.org/D48308
Files:
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/PowerPC/PPCInstrInfo.td
lib/Target/PowerPC/PPCInstrVSX.td
test/CodeGen/PowerPC/f128-aggregates.ll
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