[PATCH] D48270: [ARM] Check for unaligned access via bitcasts

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: efriedma, john.brawn, SjoerdMeijer.
Herald added a reviewer: javed.absar.
Herald added subscribers: chrib, kristof.beyls.

The load/store optimiser will convert sequential ldr/str instructions into ldrd/strd and these instructions cannot access unaligned memory.

When generating DSP instructions, we can use ldr/str instructions to load and store packed data but this means that it can be possible for those instructions to be accessing unaligned memory. This is fine for processors which support unaligned accesses, but it is not fine if these instructions are then optimised into ldrd/strd.

This patch modified ARMLoadStoreOpt pass to look through the pointer information to determine if the access size of the memory operation is safe for the optimisation. We now don't perform the transform if the access type is wider than the memory type.

This patch is to support the transformation being performed in https://reviews.llvm.org/D48128.


https://reviews.llvm.org/D48270

Files:
  lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  test/CodeGen/ARM/ldrd-strd-unaligned.ll

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