[PATCH] D48252: [MCA][NFC] Add generic TBM resource tests
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 17 03:35:01 PDT 2018
lebedev.ri added a comment.
In https://reviews.llvm.org/D48252#1134776, @RKSimon wrote:
> LGTM thanks
Thank you for the review.
Note that i don't //fully// understand the pattern here.
I followed the basic idea that for every instruction, the last (destination) register should always be the same,
the highest used register (i.e. if there is an instruction taking 3 registers, it would be `%rcx`).
All others start from `0`/`a` always. And the memory operand is always 64-bit.
Repository:
rL LLVM
https://reviews.llvm.org/D48252
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