[PATCH] D48223: DAG combine "and|or (select c, -1, 0), x" -> "select c, x, 0|-1"

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added reviewers: craig.topper, RKSimon.
lebedev.ri added inline comments.


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Comment at: test/CodeGen/X86/dagcombine-select.ll:1
+; RUN: llc -march=x86-64 -verify-machineinstrs < %s | FileCheck -enable-var-scope %s
+
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Most tests (and practically all new x86 tests) use `utils/update_llc_test_checks.py` script to auto-generate these check lines.


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Comment at: test/CodeGen/X86/dagcombine-select.ll:3-17
+; CHECK-LABEL: {{^}}select_and1:
+; CHECK:      cmpl    $11, %edi
+; CHECK-NEXT: cmovgel %esi, %eax
+; CHECK-NEXT: retq
+define i32 @select_and1(i32 %x, i32 %y) {
+  %c = icmp slt i32 %x, 11
+  %s = select i1 %c, i32 0, i32 -1
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Hm, is there some omitted instruction, or is this actually better than what we currently normally do?
https://godbolt.org/g/7ULPfH


https://reviews.llvm.org/D48223