[llvm] r334856 - [PowerPC] Add support for high and higha symbol modifiers on tls modifers.
Sean Fertile via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 15 12:47:16 PDT 2018
Author: sfertile
Date: Fri Jun 15 12:47:16 2018
New Revision: 334856
URL: http://llvm.org/viewvc/llvm-project?rev=334856&view=rev
Log:
[PowerPC] Add support for high and higha symbol modifiers on tls modifers.
Enables using the high and high-adjusted symbol modifiers on thread local
storage modifers in powerpc assembly. Needed to be able to support 64 bit
thread-pointer and dynamic-thread-pointer access sequences.
Differential Revision: https://reviews.llvm.org/D47754
Added:
llvm/trunk/test/MC/PowerPC/tls-ld-v2-abi.s
llvm/trunk/test/MC/PowerPC/tls-le-v2-abi.s
Modified:
llvm/trunk/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
llvm/trunk/include/llvm/MC/MCExpr.h
llvm/trunk/lib/MC/MCELFStreamer.cpp
llvm/trunk/lib/MC/MCExpr.cpp
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
llvm/trunk/test/MC/PowerPC/ppc64-fixups.s
Modified: llvm/trunk/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def?rev=334856&r1=334855&r2=334856&view=diff
==============================================================================
--- llvm/trunk/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def (original)
+++ llvm/trunk/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def Fri Jun 15 12:47:16 2018
@@ -91,6 +91,10 @@
#undef R_PPC64_TLSLD
#undef R_PPC64_ADDR16_HIGH
#undef R_PPC64_ADDR16_HIGHA
+#undef R_PPC64_TPREL16_HIGH
+#undef R_PPC64_TPREL16_HIGHA
+#undef R_PPC64_DTPREL16_HIGH
+#undef R_PPC64_DTPREL16_HIGHA
#undef R_PPC64_IRELATIVE
#undef R_PPC64_REL16
#undef R_PPC64_REL16_LO
@@ -180,6 +184,10 @@ ELF_RELOC(R_PPC64_TLSGD,
ELF_RELOC(R_PPC64_TLSLD, 108)
ELF_RELOC(R_PPC64_ADDR16_HIGH, 110)
ELF_RELOC(R_PPC64_ADDR16_HIGHA, 111)
+ELF_RELOC(R_PPC64_TPREL16_HIGH, 112)
+ELF_RELOC(R_PPC64_TPREL16_HIGHA, 113)
+ELF_RELOC(R_PPC64_DTPREL16_HIGH, 114)
+ELF_RELOC(R_PPC64_DTPREL16_HIGHA, 115)
ELF_RELOC(R_PPC64_IRELATIVE, 248)
ELF_RELOC(R_PPC64_REL16, 249)
ELF_RELOC(R_PPC64_REL16_LO, 250)
Modified: llvm/trunk/include/llvm/MC/MCExpr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCExpr.h?rev=334856&r1=334855&r2=334856&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCExpr.h (original)
+++ llvm/trunk/include/llvm/MC/MCExpr.h Fri Jun 15 12:47:16 2018
@@ -236,6 +236,8 @@ public:
VK_PPC_TPREL_LO, // symbol at tprel@l
VK_PPC_TPREL_HI, // symbol at tprel@h
VK_PPC_TPREL_HA, // symbol at tprel@ha
+ VK_PPC_TPREL_HIGH, // symbol at tprel@high
+ VK_PPC_TPREL_HIGHA, // symbol at tprel@higha
VK_PPC_TPREL_HIGHER, // symbol at tprel@higher
VK_PPC_TPREL_HIGHERA, // symbol at tprel@highera
VK_PPC_TPREL_HIGHEST, // symbol at tprel@highest
@@ -243,6 +245,8 @@ public:
VK_PPC_DTPREL_LO, // symbol at dtprel@l
VK_PPC_DTPREL_HI, // symbol at dtprel@h
VK_PPC_DTPREL_HA, // symbol at dtprel@ha
+ VK_PPC_DTPREL_HIGH, // symbol at dtprel@high
+ VK_PPC_DTPREL_HIGHA, // symbol at dtprel@higha
VK_PPC_DTPREL_HIGHER, // symbol at dtprel@higher
VK_PPC_DTPREL_HIGHERA, // symbol at dtprel@highera
VK_PPC_DTPREL_HIGHEST, // symbol at dtprel@highest
Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=334856&r1=334855&r2=334856&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCELFStreamer.cpp (original)
+++ llvm/trunk/lib/MC/MCELFStreamer.cpp Fri Jun 15 12:47:16 2018
@@ -411,6 +411,8 @@ void MCELFStreamer::fixSymbolsInTLSFixup
case MCSymbolRefExpr::VK_PPC_TPREL_LO:
case MCSymbolRefExpr::VK_PPC_TPREL_HI:
case MCSymbolRefExpr::VK_PPC_TPREL_HA:
+ case MCSymbolRefExpr::VK_PPC_TPREL_HIGH:
+ case MCSymbolRefExpr::VK_PPC_TPREL_HIGHA:
case MCSymbolRefExpr::VK_PPC_TPREL_HIGHER:
case MCSymbolRefExpr::VK_PPC_TPREL_HIGHERA:
case MCSymbolRefExpr::VK_PPC_TPREL_HIGHEST:
@@ -418,6 +420,8 @@ void MCELFStreamer::fixSymbolsInTLSFixup
case MCSymbolRefExpr::VK_PPC_DTPREL_LO:
case MCSymbolRefExpr::VK_PPC_DTPREL_HI:
case MCSymbolRefExpr::VK_PPC_DTPREL_HA:
+ case MCSymbolRefExpr::VK_PPC_DTPREL_HIGH:
+ case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHA:
case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHER:
case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHERA:
case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHEST:
Modified: llvm/trunk/lib/MC/MCExpr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCExpr.cpp?rev=334856&r1=334855&r2=334856&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCExpr.cpp (original)
+++ llvm/trunk/lib/MC/MCExpr.cpp Fri Jun 15 12:47:16 2018
@@ -257,6 +257,8 @@ StringRef MCSymbolRefExpr::getVariantKin
case VK_PPC_TPREL_LO: return "tprel at l";
case VK_PPC_TPREL_HI: return "tprel at h";
case VK_PPC_TPREL_HA: return "tprel at ha";
+ case VK_PPC_TPREL_HIGH: return "tprel at high";
+ case VK_PPC_TPREL_HIGHA: return "tprel at higha";
case VK_PPC_TPREL_HIGHER: return "tprel at higher";
case VK_PPC_TPREL_HIGHERA: return "tprel at highera";
case VK_PPC_TPREL_HIGHEST: return "tprel at highest";
@@ -264,6 +266,8 @@ StringRef MCSymbolRefExpr::getVariantKin
case VK_PPC_DTPREL_LO: return "dtprel at l";
case VK_PPC_DTPREL_HI: return "dtprel at h";
case VK_PPC_DTPREL_HA: return "dtprel at ha";
+ case VK_PPC_DTPREL_HIGH: return "dtprel at high";
+ case VK_PPC_DTPREL_HIGHA: return "dtprel at higha";
case VK_PPC_DTPREL_HIGHER: return "dtprel at higher";
case VK_PPC_DTPREL_HIGHERA: return "dtprel at highera";
case VK_PPC_DTPREL_HIGHEST: return "dtprel at highest";
@@ -365,6 +369,8 @@ MCSymbolRefExpr::getVariantKindForName(S
.Case("tprel at l", VK_PPC_TPREL_LO)
.Case("tprel at h", VK_PPC_TPREL_HI)
.Case("tprel at ha", VK_PPC_TPREL_HA)
+ .Case("tprel at high", VK_PPC_TPREL_HIGH)
+ .Case("tprel at higha", VK_PPC_TPREL_HIGHA)
.Case("tprel at higher", VK_PPC_TPREL_HIGHER)
.Case("tprel at highera", VK_PPC_TPREL_HIGHERA)
.Case("tprel at highest", VK_PPC_TPREL_HIGHEST)
@@ -372,6 +378,8 @@ MCSymbolRefExpr::getVariantKindForName(S
.Case("dtprel at l", VK_PPC_DTPREL_LO)
.Case("dtprel at h", VK_PPC_DTPREL_HI)
.Case("dtprel at ha", VK_PPC_DTPREL_HA)
+ .Case("dtprel at high", VK_PPC_DTPREL_HIGH)
+ .Case("dtprel at higha", VK_PPC_DTPREL_HIGHA)
.Case("dtprel at higher", VK_PPC_DTPREL_HIGHER)
.Case("dtprel at highera", VK_PPC_DTPREL_HIGHERA)
.Case("dtprel at highest", VK_PPC_DTPREL_HIGHEST)
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp?rev=334856&r1=334855&r2=334856&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp Fri Jun 15 12:47:16 2018
@@ -209,6 +209,12 @@ unsigned PPCELFObjectWriter::getRelocTyp
case MCSymbolRefExpr::VK_PPC_TPREL_HA:
Type = ELF::R_PPC_TPREL16_HA;
break;
+ case MCSymbolRefExpr::VK_PPC_TPREL_HIGH:
+ Type = ELF::R_PPC64_TPREL16_HIGH;
+ break;
+ case MCSymbolRefExpr::VK_PPC_TPREL_HIGHA:
+ Type = ELF::R_PPC64_TPREL16_HIGHA;
+ break;
case MCSymbolRefExpr::VK_PPC_TPREL_HIGHER:
Type = ELF::R_PPC64_TPREL16_HIGHER;
break;
@@ -233,6 +239,12 @@ unsigned PPCELFObjectWriter::getRelocTyp
case MCSymbolRefExpr::VK_PPC_DTPREL_HA:
Type = ELF::R_PPC64_DTPREL16_HA;
break;
+ case MCSymbolRefExpr::VK_PPC_DTPREL_HIGH:
+ Type = ELF::R_PPC64_DTPREL16_HIGH;
+ break;
+ case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHA:
+ Type = ELF::R_PPC64_DTPREL16_HIGHA;
+ break;
case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHER:
Type = ELF::R_PPC64_DTPREL16_HIGHER;
break;
Modified: llvm/trunk/test/MC/PowerPC/ppc64-fixups.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-fixups.s?rev=334856&r1=334855&r2=334856&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-fixups.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-fixups.s Fri Jun 15 12:47:16 2018
@@ -338,7 +338,6 @@ base:
# CHECK-LE-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_LO_DS target 0x0
ld 1, target at got@l(3)
-
# CHECK-BE: addis 3, 2, target at tprel@ha # encoding: [0x3c,0x62,A,A]
# CHECK-LE: addis 3, 2, target at tprel@ha # encoding: [A,A,0x62,0x3c]
# CHECK-BE-NEXT: # fixup A - offset: 2, value: target at tprel@ha, kind: fixup_ppc_half16
@@ -347,6 +346,22 @@ base:
# CHECK-LE-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HA target 0x0
addis 3, 2, target at tprel@ha
+# CHECK-BE: addis 3, 2, target at tprel@higha # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target at tprel@higha # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT: # fixup A - offset: 2, value: target at tprel@higha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT: # fixup A - offset: 0, value: target at tprel@higha, kind: fixup_ppc_half16
+# CHECK-BE-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHA target 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HIGHA target 0x0
+ addis 3, 2, target at tprel@higha
+
+# CHECK-BE: addis 3, 2, target at tprel@high # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target at tprel@high # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT: # fixup A - offset: 2, value: target at tprel@high, kind: fixup_ppc_half16
+# CHECK-LE-NEXT: # fixup A - offset: 0, value: target at tprel@high, kind: fixup_ppc_half16
+# CHECK-BE-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGH target 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HIGH target 0x0
+ addis 3, 2, target at tprel@high
+
# CHECK-BE: addi 3, 3, target at tprel@l # encoding: [0x38,0x63,A,A]
# CHECK-LE: addi 3, 3, target at tprel@l # encoding: [A,A,0x63,0x38]
# CHECK-BE-NEXT: # fixup A - offset: 2, value: target at tprel@l, kind: fixup_ppc_half16
@@ -427,6 +442,22 @@ base:
# CHECK-LE-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HA target 0x0
addis 3, 2, target at dtprel@ha
+# CHECK-BE: addis 3, 2, target at dtprel@higha # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target at dtprel@higha # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT: # fixup A - offset: 2, value: target at dtprel@higha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT: # fixup A - offset: 0, value: target at dtprel@higha, kind: fixup_ppc_half16
+# CHECK-BE-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHA target 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HIGHA target 0x0
+ addis 3, 2, target at dtprel@higha
+
+# CHECK-BE: addis 3, 2, target at dtprel@high # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target at dtprel@high # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT: # fixup A - offset: 2, value: target at dtprel@high, kind: fixup_ppc_half16
+# CHECK-LE-NEXT: # fixup A - offset: 0, value: target at dtprel@high, kind: fixup_ppc_half16
+# CHECK-BE-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGH target 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HIGH target 0x0
+ addis 3, 2, target at dtprel@high
+
# CHECK-BE: addi 3, 3, target at dtprel@l # encoding: [0x38,0x63,A,A]
# CHECK-LE: addi 3, 3, target at dtprel@l # encoding: [A,A,0x63,0x38]
# CHECK-BE-NEXT: # fixup A - offset: 2, value: target at dtprel@l, kind: fixup_ppc_half16
Added: llvm/trunk/test/MC/PowerPC/tls-ld-v2-abi.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/tls-ld-v2-abi.s?rev=334856&view=auto
==============================================================================
--- llvm/trunk/test/MC/PowerPC/tls-ld-v2-abi.s (added)
+++ llvm/trunk/test/MC/PowerPC/tls-ld-v2-abi.s Fri Jun 15 12:47:16 2018
@@ -0,0 +1,177 @@
+// RUN: llvm-mc -triple=powerpc64le-pc-linux -filetype=obj %s -o - | \
+// RUN: llvm-readobj -r | FileCheck %s
+
+// RUN: llvm-mc -triple=powerpc64-pc-linux -filetype=obj %s -o - | \
+// RUN: llvm-readobj -r | FileCheck %s
+
+// Verify we can handle all the dtprel symbol modifiers for local-dynamic tls.
+// Tests a 16 bit offset on both DS-form and D-form instructions, 32 bit
+// adjusted and non-adjusted offsets, and 64 bit adjusted and non-adjusted
+// offsets.
+ .text
+ .abiversion 2
+
+ .globl short_offset
+ .p2align 4
+ .type short_offset, at function
+short_offset:
+.Lfunc_gep0:
+ addis 2, 12, .TOC.-.Lfunc_gep0 at ha
+ addi 2, 2, .TOC.-.Lfunc_gep0 at l
+.Lfunc_lep0:
+.localentry short_offset, .Lfunc_lep0-.Lfunc_gep0
+ mflr 0
+ std 0, 16(1)
+ stdu 1, -32(1)
+ addis 3, 2, i at got@tlsld at ha
+ addi 3, 3, i at got@tlsld at l
+ bl __tls_get_addr(i at tlsld)
+ nop
+ lwa 4, i at dtprel(3)
+ addi 5, 3, i at dtprel
+ lwa 3, 0(5)
+ add 3, 4, 3
+ addi 1, 1, 32
+ ld 0, 16(1)
+ mtlr 0
+ blr
+
+ .globl medium_offset
+ .p2align 4
+ .type medium_offset, at function
+medium_offset:
+.Lfunc_gep1:
+ addis 2, 12, .TOC.-.Lfunc_gep1 at ha
+ addi 2, 2, .TOC.-.Lfunc_gep1 at l
+.Lfunc_lep1:
+ .localentry medium_offset, .Lfunc_lep1-.Lfunc_gep1
+ mflr 0
+ std 0, 16(1)
+ stdu 1, -32(1)
+ addis 3, 2, i at got@tlsld at ha
+ addi 3, 3, i at got@tlsld at l
+ bl __tls_get_addr(i at tlsld)
+ nop
+ addis 3, 3, i at dtprel@ha
+ lwa 3, i at dtprel@l(3)
+ addi 1, 1, 32
+ ld 0, 16(1)
+ mtlr 0
+ blr
+
+ .globl medium_not_adjusted
+ .p2align 4
+ .type medium_not_adjusted, at function
+medium_not_adjusted:
+.Lfunc_gep2:
+ addis 2, 12, .TOC.-.Lfunc_gep2 at ha
+ addi 2, 2, .TOC.-.Lfunc_gep2 at l
+.Lfunc_lep2:
+ .localentry medium_not_adjusted, .Lfunc_lep2-.Lfunc_gep2
+ mflr 0
+ std 0, 16(1)
+ stdu 1, -32(1)
+ addis 3, 2, i at got@tlsld at ha
+ addi 3, 3, i at got@tlsld at l
+ bl __tls_get_addr(i at tlsld)
+ nop
+ lis 4, i at dtprel@h
+ ori 4, 4, i at dtprel@l
+ add 3, 3, 4
+ addi 1, 1, 32
+ ld 0, 16(1)
+ mtlr 0
+ blr
+
+ .globl large_offset
+ .p2align 4
+ .type large_offset, at function
+large_offset:
+.Lfunc_gep3:
+ addis 2, 12, .TOC.-.Lfunc_gep3 at ha
+ addi 2, 2, .TOC.-.Lfunc_gep3 at l
+.Lfunc_lep3:
+ .localentry large_offset, .Lfunc_lep3-.Lfunc_gep3
+ mflr 0
+ std 0, 16(1)
+ stdu 1, -32(1)
+ addis 3, 2, i at got@tlsld at ha
+ addi 3, 3, i at got@tlsld at l
+ bl __tls_get_addr(i at tlsld)
+ nop
+ lis 4, i at dtprel@highesta
+ ori 4, 4, i at dtprel@highera
+ sldi 4, 4, 32
+ addis 4, 4, i at dtprel@higha
+ addi 4, 4, i at dtprel@l
+ lwax 3, 4, 3
+ addi 1, 1, 32
+ ld 0, 16(1)
+ mtlr 0
+ blr
+
+ .globl not_adjusted
+ .p2align 4
+ .type not_adjusted, at function
+not_adjusted:
+.Lfunc_gep4:
+ addis 2, 12, .TOC.-.Lfunc_gep4 at ha
+ addi 2, 2, .TOC.-.Lfunc_gep4 at l
+.Lfunc_lep4:
+ .localentry not_adjusted, .Lfunc_lep4-.Lfunc_gep4
+ mflr 0
+ std 0, 16(1)
+ stdu 1, -32(1)
+ addis 3, 2, i at got@tlsld at ha
+ addi 3, 3, i at got@tlsld at l
+ bl __tls_get_addr(i at tlsld)
+ nop
+ lis 4, i at dtprel@highest
+ ori 4, 4, i at dtprel@higher
+ sldi 4, 4, 32
+ oris 4, 4, i at dtprel@high
+ ori 4, 4, i at dtprel@l
+ lwax 3, 4, 3
+ addi 1, 1, 32
+ ld 0, 16(1)
+ mtlr 0
+ blr
+
+ .type i, at object
+ .section .tdata,"awT", at progbits
+ .p2align 2
+i:
+ .long 55
+ .size i, 4
+
+ .type j, at object
+ .data
+ .p2align 3
+j:
+ .quad i at dtprel
+ .size j, 8
+
+# CHECK: Relocations [
+# CHECK: Section {{.*}} .rela.text {
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_GOT_TLSLD16_HA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_GOT_TLSLD16_LO i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TLSLD i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_REL24 __tls_get_addr
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_DS i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16 i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_LO_DS i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HI i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HIGHESTA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HIGHERA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HIGHA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_LO i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HIGHEST i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HIGHER i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_HIGH i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL16_LO i
+# CHECK: }
+# CHECK: Section {{.*}} .rela.data {
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_DTPREL64 i
+# CHECK: }
+# CHECK: ]
Added: llvm/trunk/test/MC/PowerPC/tls-le-v2-abi.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/tls-le-v2-abi.s?rev=334856&view=auto
==============================================================================
--- llvm/trunk/test/MC/PowerPC/tls-le-v2-abi.s (added)
+++ llvm/trunk/test/MC/PowerPC/tls-le-v2-abi.s Fri Jun 15 12:47:16 2018
@@ -0,0 +1,104 @@
+// RUN: llvm-mc -triple=powerpc64le-pc-linux -filetype=obj %s -o - | \
+// RUN: llvm-readobj -r | FileCheck %s
+
+// RUN: llvm-mc -triple=powerpc64-pc-linux -filetype=obj %s -o - | \
+// RUN: llvm-readobj -r | FileCheck %s
+
+// Verify we can handle all the tprel symbol modifiers for local exec tls.
+// Tests 16 bit offsets on both DS-form and D-form instructions, 32 bit
+// adjusted and non-adjusted offsets and 64 bit adjusted and non-adjusted
+// offsets.
+ .text
+ .abiversion 2
+
+ .globl short_offset_ds
+ .p2align 4
+ .type short_offset_ds, at function
+short_offset_ds:
+ lwa 3, i at tprel(13)
+ blr
+
+ .globl short_offset
+ .p2align 4
+ .type short_offset, at function
+short_offset:
+ addi 3, 13, i at tprel
+ blr
+
+ .globl medium_offset
+ .p2align 4
+ .type medium_offset, at function
+medium_offset:
+ addis 3, 13, i at tprel@ha
+ lwa 3, i at tprel@l(3)
+ blr
+
+ .globl medium_not_adjusted
+ .p2align 4
+ .type medium_not_adjusted, at function
+medium_not_adjusted:
+ lis 3, i at tprel@h
+ ori 3, 3, i at tprel@l
+ lwax 3, 3, 13
+ blr
+
+ .globl large_offset
+ .p2align 4
+ .type large_offset, at function
+large_offset:
+ lis 3, i at tprel@highesta
+ ori 3, 3, i at tprel@highera
+ sldi 3, 3, 32
+ oris 3, 3, i at tprel@higha
+ addi 3, 3, i at tprel@l
+ lwax 3, 3, 13
+ blr
+
+ .globl not_adjusted
+ .p2align 4
+ .type not_adjusted, at function
+not_adjusted:
+ lis 3, i at tprel@highest
+ ori 3, 3, i at tprel@higher
+ sldi 3, 3, 32
+ oris 3, 3, i at tprel@high
+ ori 3, 3, i at tprel@l
+ lwax 3, 3, 13
+ blr
+
+ .type i, at object
+ .section .tdata,"awT", at progbits
+ .p2align 2
+i:
+ .long 55
+ .size i, 4
+
+ .type j, at object
+ .data
+ .p2align 3
+j:
+ .quad i at tprel
+ .size j, 8
+
+
+# CHECK: Relocations [
+# CHECK: Section {{.*}} .rela.text {
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_DS i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16 i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO_DS i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HI i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHESTA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHERA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHA i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHEST i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHER i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGH i
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO i
+# CHECK: }
+# CHECK: Section (6) .rela.data {
+# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL64 i
+# CHECK: }
+# CHECK: ]
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