[PATCH] D48183: [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.

[Derek Schuff via Phabricator via llvm-commits]

dschuff added inline comments.


================
Comment at: lib/Target/WebAssembly/WebAssemblyInstrFormats.td:39
+// Typically the only difference is that in the stack one the registers are
+// omitted and instead implicit.
+// Every instruction should want to be based on this multi-class to guarantee
----------------
dschuff wrote:
> I think the "instead implicit" wording is a bit confusing given that we refer to the stack version as the "explicit locals" version. In this comment I might put even more detail like:
> "The register versions have virtual-register operands which correspond to wasm locals. Each use and def of the register corresponds to an implicit get_local or set_local operation in wasm. These instructions are used for ISel and all MI passes. The stack versions of the instructions do not have register operands (they implicitly operate on the stack), and get_locals and set_locals are explicit. The register instructions are converted to their corresponding stack instructions before lowering to MC".
After this lands, it probably makes sense to just turn the explicit-locals pass into the full register->stack conversion pass.


Repository:
  rL LLVM

https://reviews.llvm.org/D48183