[lld] r334637 - Add Hexagon Support
Sid Manning via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 13 11:45:25 PDT 2018
Author: sidneym
Date: Wed Jun 13 11:45:25 2018
New Revision: 334637
URL: http://llvm.org/viewvc/llvm-project?rev=334637&view=rev
Log:
Add Hexagon Support
Differential Revision: https://reviews.llvm.org/D47791
Added:
lld/trunk/ELF/Arch/Hexagon.cpp
lld/trunk/test/ELF/Inputs/hexagon.s
lld/trunk/test/ELF/hexagon.s
Modified:
lld/trunk/ELF/CMakeLists.txt
lld/trunk/ELF/Target.cpp
lld/trunk/ELF/Target.h
lld/trunk/test/lit.cfg.py
Added: lld/trunk/ELF/Arch/Hexagon.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/Hexagon.cpp?rev=334637&view=auto
==============================================================================
--- lld/trunk/ELF/Arch/Hexagon.cpp (added)
+++ lld/trunk/ELF/Arch/Hexagon.cpp Wed Jun 13 11:45:25 2018
@@ -0,0 +1,84 @@
+//===-- Hexagon.cpp -------------------------------------------------------===//
+//
+// The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "InputFiles.h"
+#include "Symbols.h"
+#include "Target.h"
+#include "lld/Common/ErrorHandler.h"
+#include "llvm/BinaryFormat/ELF.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::object;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class Hexagon final : public TargetInfo {
+public:
+ uint32_t calcEFlags() const override;
+ uint32_t applyMask(uint32_t Mask, uint32_t Data) const;
+ RelExpr getRelExpr(RelType Type, const Symbol &S,
+ const uint8_t *Loc) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+};
+} // namespace
+
+// Support V60 only at the moment.
+uint32_t Hexagon::calcEFlags() const {
+ return 0x60;
+}
+
+uint32_t Hexagon::applyMask(uint32_t Mask, uint32_t Data) const {
+ uint32_t Result = 0;
+ size_t Off = 0;
+
+ for (size_t Bit = 0; Bit != 32; ++Bit) {
+ uint32_t ValBit = (Data >> Off) & 1;
+ uint32_t MaskBit = (Mask >> Bit) & 1;
+ if (MaskBit) {
+ Result |= (ValBit << Bit);
+ ++Off;
+ }
+ }
+ return Result;
+}
+
+RelExpr Hexagon::getRelExpr(RelType Type, const Symbol &S,
+ const uint8_t *Loc) const {
+ switch (Type) {
+ case R_HEX_B22_PCREL:
+ return R_PC;
+ default:
+ return R_ABS;
+ }
+}
+
+static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); }
+
+void Hexagon::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
+ switch (Type) {
+ case R_HEX_NONE:
+ break;
+ case R_HEX_B22_PCREL:
+ or32le(Loc, applyMask(0x01ff3ffe, ((Val >> 2) & 0x3fffff)));
+ break;
+ default:
+ error(getErrorLocation(Loc) + "unrecognized reloc " + toString(Type));
+ break;
+ }
+}
+
+TargetInfo *elf::getHexagonTargetInfo() {
+ static Hexagon Target;
+ return &Target;
+}
Modified: lld/trunk/ELF/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/CMakeLists.txt?rev=334637&r1=334636&r2=334637&view=diff
==============================================================================
--- lld/trunk/ELF/CMakeLists.txt (original)
+++ lld/trunk/ELF/CMakeLists.txt Wed Jun 13 11:45:25 2018
@@ -12,6 +12,7 @@ add_lld_library(lldELF
Arch/AMDGPU.cpp
Arch/ARM.cpp
Arch/AVR.cpp
+ Arch/Hexagon.cpp
Arch/Mips.cpp
Arch/MipsArchTree.cpp
Arch/PPC.cpp
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=334637&r1=334636&r2=334637&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Wed Jun 13 11:45:25 2018
@@ -60,6 +60,8 @@ TargetInfo *elf::getTarget() {
return getARMTargetInfo();
case EM_AVR:
return getAVRTargetInfo();
+ case EM_HEXAGON:
+ return getHexagonTargetInfo();
case EM_MIPS:
switch (Config->EKind) {
case ELF32LEKind:
Modified: lld/trunk/ELF/Target.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.h?rev=334637&r1=334636&r2=334637&view=diff
==============================================================================
--- lld/trunk/ELF/Target.h (original)
+++ lld/trunk/ELF/Target.h Wed Jun 13 11:45:25 2018
@@ -140,6 +140,7 @@ TargetInfo *getAArch64TargetInfo();
TargetInfo *getAMDGPUTargetInfo();
TargetInfo *getARMTargetInfo();
TargetInfo *getAVRTargetInfo();
+TargetInfo *getHexagonTargetInfo();
TargetInfo *getPPC64TargetInfo();
TargetInfo *getPPCTargetInfo();
TargetInfo *getSPARCV9TargetInfo();
Added: lld/trunk/test/ELF/Inputs/hexagon.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/Inputs/hexagon.s?rev=334637&view=auto
==============================================================================
--- lld/trunk/test/ELF/Inputs/hexagon.s (added)
+++ lld/trunk/test/ELF/Inputs/hexagon.s Wed Jun 13 11:45:25 2018
@@ -0,0 +1,6 @@
+.global _start
+_start:
+ nop
+.global foo
+foo:
+ jumpr lr
Added: lld/trunk/test/ELF/hexagon.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/hexagon.s?rev=334637&view=auto
==============================================================================
--- lld/trunk/test/ELF/hexagon.s (added)
+++ lld/trunk/test/ELF/hexagon.s Wed Jun 13 11:45:25 2018
@@ -0,0 +1,9 @@
+# REQUIRES: hexagon
+# RUN: llvm-mc -filetype=obj -triple=hexagon-unknown-elf %s -o %t
+# RUN: llvm-mc -filetype=obj -triple=hexagon-unknown-elf %S/Inputs/hexagon.s -o %t2
+# RUN: ld.lld %t2 %t -o %t3
+# RUN: llvm-objdump -d %t3 | FileCheck %s
+
+# R_HEX_B22_PCREL
+call #_start
+# CHECK: call 0x11000
Modified: lld/trunk/test/lit.cfg.py
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/lit.cfg.py?rev=334637&r1=334636&r2=334637&view=diff
==============================================================================
--- lld/trunk/test/lit.cfg.py (original)
+++ lld/trunk/test/lit.cfg.py Wed Jun 13 11:45:25 2018
@@ -65,6 +65,7 @@ llvm_config.feature_config(
'AMDGPU': 'amdgpu',
'ARM': 'arm',
'AVR': 'avr',
+ 'Hexagon': 'hexagon',
'Mips': 'mips',
'PowerPC': 'ppc',
'Sparc': 'sparc',
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