[PATCH] D47383: [AMDGPU] Avoid using divergent value in mubuf addr64 descriptor
Tim Renouf via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 13 07:27:54 PDT 2018
tpr marked an inline comment as done.
tpr added inline comments.
================
Comment at: lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1002
+ const SDValue Ops0[] = {
+ DAG.getTargetConstant(AMDGPU::SGPR_64RegClassID, DL, MVT::i32),
+ SDValue(DAG.getMachineNode(AMDGPU::S_MOV_B32, DL, MVT::i32, ValLo), 0),
----------------
arsenm wrote:
> arsenm wrote:
> > SReg_64_XEXEC
> Probably should also create a helper that the constant lowering can use as well since this is basically the same
I left the SGPR_64RegClassID as that's what the existing code for a 64 bit constant load has. I have done the suggested helper func.
Repository:
rL LLVM
https://reviews.llvm.org/D47383
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