[PATCH] D47587: [RISCV] Codegen support for atomic operations on RV32I
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 13 04:55:35 PDT 2018
asb updated this revision to Diff 151125.
asb added a comment.
Herald added a subscriber: rogfer01.
Update to add atomicrmw max/min/umax/umin to tests.
https://reviews.llvm.org/D47587
Files:
lib/Target/RISCV/RISCVISelLowering.cpp
lib/Target/RISCV/RISCVInstrInfo.td
lib/Target/RISCV/RISCVTargetMachine.cpp
test/CodeGen/RISCV/atomic-cmpxchg.ll
test/CodeGen/RISCV/atomic-fence.ll
test/CodeGen/RISCV/atomic-load-store.ll
test/CodeGen/RISCV/atomic-rmw.ll
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