[PATCH] D47507: [MC] [X86] Teach leaq _GLOBAL_OFFSET_TABLE(%rip), %r15 to use R_X86_64_GOTPC32 instead of R_X86_64_PC32

[Fangrui Song via Phabricator via llvm-commits]

MaskRay updated this revision to Diff 150968.
MaskRay added a comment.

.


Repository:
  rL LLVM

https://reviews.llvm.org/D47507

Files:
  lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
  test/MC/ELF/relocation.s


Index: test/MC/ELF/relocation.s
===================================================================
--- test/MC/ELF/relocation.s
+++ test/MC/ELF/relocation.s
@@ -39,6 +39,8 @@
 
         leaq    -1+foo(%rip), %r11
 
+        leaq  _GLOBAL_OFFSET_TABLE_(%rax), %r15
+        leaq  _GLOBAL_OFFSET_TABLE_(%rip), %r15
         movl  $_GLOBAL_OFFSET_TABLE_, %eax
         movabs  $_GLOBAL_OFFSET_TABLE_, %rax
 
@@ -94,18 +96,20 @@
 // CHECK-NEXT:       0x8F R_X86_64_PC8 foo 0x8F
 // CHECK-NEXT:       0x91 R_X86_64_PLT32 zed 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x98 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFB
-// CHECK-NEXT:       0x9D R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x1
-// CHECK-NEXT:       0xA3 R_X86_64_GOTPC64 _GLOBAL_OFFSET_TABLE_ 0x2
-// CHECK-NEXT:       0xAB R_X86_64_SIZE64 blah 0x0
-// CHECK-NEXT:       0xB3 R_X86_64_SIZE64 blah 0x20
-// CHECK-NEXT:       0xBB R_X86_64_SIZE64 blah 0xFFFFFFFFFFFFFFE0
-// CHECK-NEXT:       0xC6 R_X86_64_SIZE32 blah 0x0
-// CHECK-NEXT:       0xCD R_X86_64_SIZE32 blah 0x20
-// CHECK-NEXT:       0xD4 R_X86_64_SIZE32 blah 0xFFFFFFFFFFFFFFE0
-// CHECK-NEXT:       0xD8 R_X86_64_GOTPCREL foo 0x0
-// CHECK-NEXT:       0xDC R_X86_64_PLT32 foo 0x0
-// CHECK-NEXT:       0xF0 R_X86_64_32 .text 0xF0
-// CHECK-NEXT:       0xF5 R_X86_64_PC16 pr23771 0xFFFFFFFFFFFFFFFE
-// CHECK-NEXT:       0xF7 R_X86_64_PC32 pr23272 0x0
+// CHECK-NEXT:       0x9F R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x3
+// CHECK-NEXT:       0xA6 R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0xAB R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x1
+// CHECK-NEXT:       0xB1 R_X86_64_GOTPC64 _GLOBAL_OFFSET_TABLE_ 0x2
+// CHECK-NEXT:       0xB9 R_X86_64_SIZE64 blah 0x0
+// CHECK-NEXT:       0xC1 R_X86_64_SIZE64 blah 0x20
+// CHECK-NEXT:       0xC9 R_X86_64_SIZE64 blah 0xFFFFFFFFFFFFFFE0
+// CHECK-NEXT:       0xD4 R_X86_64_SIZE32 blah 0x0
+// CHECK-NEXT:       0xDB R_X86_64_SIZE32 blah 0x20
+// CHECK-NEXT:       0xE2 R_X86_64_SIZE32 blah 0xFFFFFFFFFFFFFFE0
+// CHECK-NEXT:       0xE6 R_X86_64_GOTPCREL foo 0x0
+// CHECK-NEXT:       0xEA R_X86_64_PLT32 foo 0x0
+// CHECK-NEXT:       0xFE R_X86_64_32 .text 0xFE
+// CHECK-NEXT:       0x103 R_X86_64_PC16 pr23771 0xFFFFFFFFFFFFFFFE
+// CHECK-NEXT:       0x105 R_X86_64_PC32 pr23272 0x0
 // CHECK-NEXT:     ]
 // CHECK-NEXT:   }
Index: lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
===================================================================
--- lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -350,8 +350,14 @@
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_movq_load) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex) ||
-      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel))
+      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel)) {
     ImmOffset -= 4;
+    // If this is a pc-relative load off _GLOBAL_OFFSET_TABLE_:
+    // leaq _GLOBAL_OFFSET_TABLE_(%rip), %r15
+    // this needs to be a GOTPC32 relocation.
+    if (StartsWithGlobalOffsetTable(Expr) != GOT_None)
+      FixupKind = MCFixupKind(X86::reloc_global_offset_table);
+  }
   if (FixupKind == FK_PCRel_2)
     ImmOffset -= 2;
   if (FixupKind == FK_PCRel_1)


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