[PATCH] D48056: [AArch64] Implement FLT_ROUNDS macro
Michael Brase via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 11 15:26:06 PDT 2018
mbrase created this revision.
mbrase added a reviewer: mcrosier.
Herald added a reviewer: javed.absar.
Herald added subscribers: llvm-commits, kristof.beyls.
Addresses https://bugs.llvm.org/show_bug.cgi?id=25191
This patch adds AArch64 support for `__builtin_flt_rounds()` intrinsic by implementing custom lowering to compute it from the FPCR system register. I based this change heavily off of the implementation in the ARM backend.
Repository:
rL LLVM
https://reviews.llvm.org/D48056
Files:
include/llvm/IR/IntrinsicsAArch64.td
lib/Target/AArch64/AArch64ISelLowering.cpp
lib/Target/AArch64/AArch64ISelLowering.h
lib/Target/AArch64/AArch64InstrInfo.td
test/CodeGen/AArch64/arm64-fpcr.ll
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