[llvm] r334420 - [AMDGPU] Do not consider indirect acces through phi for wave limiter
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 11 09:50:49 PDT 2018
Author: rampitec
Date: Mon Jun 11 09:50:49 2018
New Revision: 334420
URL: http://llvm.org/viewvc/llvm-project?rev=334420&view=rev
Log:
[AMDGPU] Do not consider indirect acces through phi for wave limiter
Rational: if there is indirect access that is usually an issue
because load is not ready by the use. However, if use is inside a
loop and load is outside that is potentially an issue for a first
iteration only.
Differential Revision: https://reviews.llvm.org/D47740
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
llvm/trunk/test/CodeGen/AMDGPU/perfhint.ll
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp?rev=334420&r1=334419&r2=334420&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp Mon Jun 11 09:50:49 2018
@@ -198,12 +198,6 @@ bool AMDGPUPerfHint::isIndirectAccess(co
continue;
}
- if (auto Phi = dyn_cast<PHINode>(V)) {
- for (unsigned I = 0, E = Phi->getNumIncomingValues(); I != E; ++I)
- WorkSet.insert(Phi->getIncomingValue(I));
- continue;
- }
-
LLVM_DEBUG(dbgs() << " dropped\n");
}
Modified: llvm/trunk/test/CodeGen/AMDGPU/perfhint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/perfhint.ll?rev=334420&r1=334419&r2=334420&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/perfhint.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/perfhint.ll Mon Jun 11 09:50:49 2018
@@ -82,4 +82,30 @@ bb:
ret void
}
+; GCN-LABEL: {{^}}test_indirect_through_phi:
+; MemoryBound: 0
+; WaveLimiterHint : 0
+define amdgpu_kernel void @test_indirect_through_phi(float addrspace(1)* %arg) {
+bb:
+ %load = load float, float addrspace(1)* %arg, align 8
+ %load.f = bitcast float %load to i32
+ %n = tail call i32 @llvm.amdgcn.workitem.id.x()
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb
+ %phi = phi i32 [ %load.f, %bb ], [ %and2, %bb1 ]
+ %ind = phi i32 [ 0, %bb ], [ %inc2, %bb1 ]
+ %and1 = and i32 %phi, %n
+ %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %and1
+ store float %load, float addrspace(1)* %gep, align 4
+ %inc1 = add nsw i32 %phi, 1310720
+ %and2 = and i32 %inc1, %n
+ %inc2 = add nuw nsw i32 %ind, 1
+ %cmp = icmp eq i32 %inc2, 1024
+ br i1 %cmp, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret void
+}
+
declare i32 @llvm.amdgcn.workitem.id.x()
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