[PATCH] D47993: [x86] fix mappings of cvttp2si x86 intrinsics to x86-specific nodes and isel patterns (PR37551)

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: craig.topper, RKSimon, gbedwell.
Herald added a subscriber: mcrosier.

The tests in:
https://bugs.llvm.org/show_bug.cgi?id=37751
...show miscompiles because we wrongly mapped and folded x86-specific intrinsics into generic DAG nodes.

This patch corrects the mappings in X86IntrinsicsInfo.h and adds isel matching corresponding to the new patterns. The complete tests for the failure cases should be in avx-cvttp2si.ll and sse-cvttp2si.ll (let me know if you see any missing possibilities/targets). This could be 3 independent reviews/commits if that's preferred.

We mentioned reordering the existing defs in PR37751, but I've postponed that potential change because we might prefer the way we're handling the codegen for AVX512 as shown here. In particular, we're seeing improvements in avx512vl-intrinsics-upgrade.ll because we're able to fold the 2 conversion calls together and then use a simpler move+mask. This is because I didn't exclude AVX512 from the new tablegen patterns, but the existing defs have 'NoVLX' predicates. I don't know AVX512, so I'm not sure if the existing defs are ideal or not.


https://reviews.llvm.org/D47993

Files:
  lib/Target/X86/X86InstrSSE.td
  lib/Target/X86/X86IntrinsicsInfo.h
  test/CodeGen/X86/avx-cvttp2si.ll
  test/CodeGen/X86/avx-intrinsics-x86.ll
  test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
  test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
  test/CodeGen/X86/mmx-cvt.ll
  test/CodeGen/X86/sse-cvttp2si.ll
  test/CodeGen/X86/sse2-intrinsics-x86.ll

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