[PATCH] D46552: [AArch64] Support reserving x20 register
Petr Hosek via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 8 19:54:13 PDT 2018
phosek updated this revision to Diff 150601.
phosek marked an inline comment as done.
phosek retitled this revision from "[AArch64] Support reserving x19 and x20 register" to "[AArch64] Support reserving x20 register".
phosek edited the summary of this revision.
phosek added a comment.
I have modified the patch to support x20 since we only need only a single register at the moment.
Repository:
rL LLVM
https://reviews.llvm.org/D46552
Files:
clang/docs/ClangCommandLineReference.rst
clang/include/clang/Driver/Options.td
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-fixed-x20.c
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
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