[PATCH] D47921: [ARM] Allow CMPZ transforms even if the input has multiple uses.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 8 14:22:35 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL334322: [ARM] Allow CMPZ transforms even if the input has multiple uses. (authored by efriedma, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D47921?vs=150438&id=150570#toc
Repository:
rL LLVM
https://reviews.llvm.org/D47921
Files:
llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/trunk/test/CodeGen/ARM/and-cmpz.ll
llvm/trunk/test/CodeGen/ARM/load_i1_select.ll
llvm/trunk/test/CodeGen/Thumb/thumb-shrink-wrapping.ll
Index: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -2459,7 +2459,7 @@
SDValue X = And.getOperand(0);
auto C = dyn_cast<ConstantSDNode>(And.getOperand(1));
- if (!C || !X->hasOneUse())
+ if (!C)
return;
auto Range = getContiguousRangeOfSetBits(C->getAPIntValue());
if (!Range)
Index: llvm/trunk/test/CodeGen/Thumb/thumb-shrink-wrapping.ll
===================================================================
--- llvm/trunk/test/CodeGen/Thumb/thumb-shrink-wrapping.ll
+++ llvm/trunk/test/CodeGen/Thumb/thumb-shrink-wrapping.ll
@@ -646,12 +646,12 @@
; CHECK-NEXT: beq [[EXIT_LABEL:LBB[0-9_]+]]
; ENABLE: push {r4, lr}
-; CHECK: tst r3, r4
+; CHECK: lsls r4, r3, #30
; ENABLE-NEXT: ldr [[POP:r[4567]]], [sp, #4]
; ENABLE-NEXT: mov lr, [[POP]]
; ENABLE-NEXT: pop {[[POP]]}
; ENABLE-NEXT: add sp, #4
-; CHECK-NEXT: beq [[EXIT_LABEL]]
+; CHECK-NEXT: bpl [[EXIT_LABEL]]
; CHECK: str r1, [r2]
; CHECK: str r3, [r2]
Index: llvm/trunk/test/CodeGen/ARM/load_i1_select.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/load_i1_select.ll
+++ llvm/trunk/test/CodeGen/ARM/load_i1_select.ll
@@ -8,7 +8,7 @@
; CHECK-LABEL: foo:
; CHECK: ldrb r[[R0:[0-9]+]], [r0]
-; CHECK: tst.w r[[R0]], #1
+; CHECK: lsls r{{[0-9]+}}, r[[R0]], #31
define void @foo(i8* %call, double* %p) nounwind {
entry:
%tmp2 = load i8, i8* %call
Index: llvm/trunk/test/CodeGen/ARM/and-cmpz.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/and-cmpz.ll
+++ llvm/trunk/test/CodeGen/ARM/and-cmpz.ll
@@ -18,6 +18,24 @@
ret i32 2
}
+; CHECK-LABEL: single_bit_multi_use:
+; CHECK: lsls r0, r0, #23
+; T2-NEXT: mov
+; T2-NEXT: it
+; T1-NEXT: bmi
+define i32 @single_bit_multi_use(i32 %p, i32* %z) {
+ store i32 %p, i32* %z
+ %a = and i32 %p, 256
+ %b = icmp eq i32 %a, 0
+ br i1 %b, label %true, label %false
+
+true:
+ ret i32 1
+
+false:
+ ret i32 2
+}
+
; CHECK-LABEL: multi_bit_lsb_ubfx:
; CHECK: lsls r0, r0, #24
; T2-NEXT: mov
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