[PATCH] D47878: [DAGCombiner] Fix for PR37667
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 7 05:15:29 PDT 2018
samparker created this revision.
samparker added reviewers: spatel, niravd.
While trying to propagate AND masks back to loads, we currently allow one non-load node to be included as a leaf in chain. This fix now limits that node to produce only a single data value.
https://reviews.llvm.org/D47878
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
test/CodeGen/X86/pr37667.ll
Index: test/CodeGen/X86/pr37667.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/pr37667.ll
@@ -0,0 +1,26 @@
+; RUN: llc -O1 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+
+ at b = local_unnamed_addr global i32 918, align 4
+ at d = local_unnamed_addr global i32 8089, align 4
+ at c = common local_unnamed_addr global i32 0, align 4
+ at a = common local_unnamed_addr global i32 0, align 4
+
+; CHECK-LABEL: PR37667:
+; CHECK: movl b(%rip), %eax
+; CHECK: xorl %edx, %edx
+; CHECK: divl d(%rip)
+; CHECK: orl c(%rip), %edx
+; CHECK: movzbl %dl, %eax
+; CHECK: movl %eax, a(%rip)
+; CHECK: retq
+define void @PR37667() {
+ %t0 = load i32, i32* @c, align 4
+ %t1 = load i32, i32* @b, align 4
+ %t2 = load i32, i32* @d, align 4
+ %rem = urem i32 %t1, %t2
+ %or = or i32 %rem, %t0
+ %conv1 = and i32 %or, 255
+ store i32 %conv1, i32* @a, align 4
+ ret void
+}
+
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3997,7 +3997,22 @@
// Allow one node which will masked along with any loads found.
if (NodeToMask)
return false;
+
+ // Also ensure that the node to be masked only produces one data result.
NodeToMask = Op.getNode();
+ if (NodeToMask->getNumValues() > 1) {
+ unsigned DataValues = 0;
+ for (unsigned i = 0; i < NodeToMask->getNumValues(); ++i) {
+ MVT VT = SDValue(NodeToMask, i).getSimpleValueType();
+ if (VT == MVT::Glue || VT == MVT::Other)
+ continue;
+ ++DataValues;
+ }
+ if (DataValues > 1) {
+ NodeToMask = nullptr;
+ return false;
+ }
+ }
}
return true;
}
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