[llvm] r334133 - [InstCombine] add tests for another abs() pattern (PR36036); NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 6 14:32:42 PDT 2018
Author: spatel
Date: Wed Jun 6 14:32:42 2018
New Revision: 334133
URL: http://llvm.org/viewvc/llvm-project?rev=334133&view=rev
Log:
[InstCombine] add tests for another abs() pattern (PR36036); NFC
Modified:
llvm/trunk/test/Transforms/InstCombine/abs-1.ll
Modified: llvm/trunk/test/Transforms/InstCombine/abs-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/abs-1.ll?rev=334133&r1=334132&r2=334133&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/abs-1.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/abs-1.ll Wed Jun 6 14:32:42 2018
@@ -296,6 +296,61 @@ define i8 @shifty_abs_too_many_uses(i8 %
ret i8 %abs
}
+; There's another way to make abs() using shift, xor, and subtract.
+; PR36036 - https://bugs.llvm.org/show_bug.cgi?id=36036
+
+define i8 @shifty_sub(i8 %x) {
+; CHECK-LABEL: @shifty_sub(
+; CHECK-NEXT: [[SH:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[SH]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = sub i8 [[XOR]], [[SH]]
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %sh = ashr i8 %x, 7
+ %xor = xor i8 %x, %sh
+ %r = sub i8 %xor, %sh
+ ret i8 %r
+}
+
+define i8 @shifty_sub_nsw_commute(i8 %x) {
+; CHECK-LABEL: @shifty_sub_nsw_commute(
+; CHECK-NEXT: [[SH:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[SH]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = sub nsw i8 [[XOR]], [[SH]]
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %sh = ashr i8 %x, 7
+ %xor = xor i8 %sh, %x
+ %r = sub nsw i8 %xor, %sh
+ ret i8 %r
+}
+
+define <4 x i32> @shifty_sub_nuw_vec_commute(<4 x i32> %x) {
+; CHECK-LABEL: @shifty_sub_nuw_vec_commute(
+; CHECK-NEXT: [[SH:%.*]] = ashr <4 x i32> [[X:%.*]], <i32 31, i32 31, i32 31, i32 31>
+; CHECK-NEXT: [[XOR:%.*]] = xor <4 x i32> [[SH]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = sub nuw <4 x i32> [[XOR]], [[SH]]
+; CHECK-NEXT: ret <4 x i32> [[R]]
+;
+ %sh = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
+ %xor = xor <4 x i32> %sh, %x
+ %r = sub nuw <4 x i32> %xor, %sh
+ ret <4 x i32> %r
+}
+
+define i12 @shifty_sub_nsw_nuw(i12 %x) {
+; CHECK-LABEL: @shifty_sub_nsw_nuw(
+; CHECK-NEXT: [[SH:%.*]] = ashr i12 [[X:%.*]], 11
+; CHECK-NEXT: [[XOR:%.*]] = xor i12 [[SH]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = sub nuw nsw i12 [[XOR]], [[SH]]
+; CHECK-NEXT: ret i12 [[R]]
+;
+ %sh = ashr i12 %x, 11
+ %xor = xor i12 %x, %sh
+ %r = sub nsw nuw i12 %xor, %sh
+ ret i12 %r
+}
+
define i8 @negate_abs(i8 %x) {
; CHECK-LABEL: @negate_abs(
; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X:%.*]]
@@ -334,3 +389,4 @@ define i1 @abs_must_be_positive(i32 %x)
%c2 = icmp sge i32 %sel, 0
ret i1 %c2
}
+
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