[llvm] r334121 - [X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 are used as the index.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Wed Jun  6 12:15:15 2018
New Revision: 334121

URL: http://llvm.org/viewvc/llvm-project?rev=334121&view=rev
Log:
[X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 are used as the index.

These encodings correspond to the cases in the normal encoding scheme where there is no index and our modrm reading code initially decodes it as such. The VSIB handling code tried to compensate for this, but failed to add the base needed to make later code do the right thing.

Fixes PR37712.

Modified:
    llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
    llvm/trunk/test/MC/Disassembler/X86/avx-512.txt

Modified: llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp?rev=334121&r1=334120&r2=334121&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp Wed Jun  6 12:15:15 2018
@@ -1773,7 +1773,7 @@ static int readOperands(struct InternalI
 
       // If sibIndex was set to SIB_INDEX_NONE, index offset is 4.
       if (insn->sibIndex == SIB_INDEX_NONE)
-        insn->sibIndex = (SIBIndex)4;
+        insn->sibIndex = (SIBIndex)(insn->sibIndexBase + 4);
 
       // If EVEX.v2 is set this is one of the 16-31 registers.
       if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT &&

Modified: llvm/trunk/test/MC/Disassembler/X86/avx-512.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/avx-512.txt?rev=334121&r1=334120&r2=334121&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/avx-512.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/avx-512.txt Wed Jun  6 12:15:15 2018
@@ -47,6 +47,9 @@
 # CHECK: vgatherdpd      (%rsi,%ymm0,4), %zmm1 {%k2}
 0x62 0xf2 0xfd 0x4a 0x92 0x0c 0x86
 
+# CHECK: vgatherqps (%r13,%zmm4), %ymm5 {%k2}
+0x62 0xd2 0x7d 0x4a 0x93 0x6c 0x25 0x00
+
 # CHECK: vpslld $16, %zmm21, %zmm22
 0x62 0xb1 0x4d 0x40 0x72 0xf5 0x10