[PATCH] D47823: AMDGPU: Try a lot harder to emit scalar loads

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:1104
+    SDValue ShiftAmt = DAG.getConstant(OffsetDiff * 8, SL, MVT::i32);
+    SDValue Extract = DAG.getNode(ISD::SRL, SL, MVT::i32, Load, ShiftAmt);
+
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It can happen that offset diff is zero and then shift is not needed. Say you have kernarg layout: i32 a, i16 b, i16 c. For 'b' align will be 2, but offset will be 4.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:5364
+                                MVT::i32, SL, Ld->getChain(), Ptr,
+                                DAG.getUNDEF(Ptr.getValueType()),
+                                Ld->getPointerInfo(), MVT::i32,
----------------
Why do not you want to get pointer, pointer info, AA and the rest from original load?


https://reviews.llvm.org/D47823